IP Library › Granted Patent US 9,202,939
Granted Patent B2
US 9,202,939 · App. 14/177,231 · Granted Dec 1, 2015

Schottky diode and method for fabricating the same

Inventor: Wei-Shan Liao (Yunlin County, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/872H01L21/283H01L21/324H01L29/06H01L29/0619H01L29/45H01L29/66143
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Quick Facts
Patent No.
US 9,202,939
App. No.
14/177,231
Granted
Dec 1, 2015
Kind
B2
Abstract

A Schottky diode is disclosed. The Schottky diode includes: a substrate, a first-type buried layer in the substrate, a cathode region, an anode region surrounding the cathode region, and a first-type guard ring surrounding the anode region and connected to the first-type buried layer. The cathode region preferably includes a high-voltage second-type lightly doped drain in the substrate, a first-type well surrounding the high-voltage second-type lightly doped drain, and a first-type doping region in the first-type well and surrounding the high-voltage second-type lightly doped drain.

Claims (64)

1. A Schottky diode, comprising:

a substrate;

a first-type buried layer in the substrate;

a cathode region, comprising:

a high-voltage second-type lightly doped drain in the substrate;

a first-type well surrounding the high-voltage second-type lightly doped drain; and

a first-type doping region in the first-type well and surrounding the high-voltage second-type lightly doped drain;

an anode region surrounding the cathode region; and

a first-type guard ring surrounding the anode region and connected to the first-type buried layer.

2. The Schottky diode of claim 1 , further comprising a second-type buried layer between the first-type buried layer and the cathode region.

3. The Schottky diode of claim 2 , further comprising a high-voltage second-type well between the second-type buried layer, the first-type guard ring, the cathode region, and the anode region.

4. The Schottky diode of claim 1 , wherein the anode region comprises:

the high-voltage second-type lightly doped drain; and

a second-type doping region in the high-voltage second-type lightly doped drain.

5. The Schottky diode of claim 1 , wherein the first-type guard ring comprises:

a high-voltage deep first-type well;

a high-voltage first-type lightly doped drain in the high-voltage deep first-type well;

the first-type well in the high-voltage first-type lightly doped drain;

a first-type lightly doped drain in the first-type well; and

the first-type doping region in the first-type lightly doped drain.

6. The Schottky diode of claim 1 , further comprising a second-type guard ring surrounding the first-type guard ring, wherein the second-type guard ring comprises:

a high-voltage second-type well;

a second-type well in the high-voltage second-type well; and

a second-type doping region in the second-type well.

7. The Schottky diode of claim 1 , further comprising an isolation structure between the cathode region and the anode region, and between the anode region and the first-type guard ring.

8. The Schottky diode of claim 1 , further comprising a contact plug directly contacting the high-voltage second-type lightly doped drain.

9. The Schottky diode of claim 8 , wherein the contact plug comprises Ti and TiN.

10. The Schottky diode of claim 1 , wherein the first-type is n-type and second-type is p-type.

11. A method for fabricating Schottky diode, comprising:

providing a substrate;

forming a first-type buried layer in the substrate;

forming a first-type guard ring in the substrate, wherein the first-type guard ring contacts the first-type buried layer;

forming a cathode region in the substrate, wherein the cathode region comprises:

a high-voltage second-type lightly doped drain in the substrate;

a first-type well surrounding the high-voltage second-type lightly doped drain; and

a first-type doping region in the first-type well surrounding the high-voltage second-type lightly doped drain; and

forming an anode region between the cathode region and the first-type guard ring.

12. The method of claim 11 , further comprising forming a second-type buried layer between the first-type buried layer and the cathode region.

13. The method of claim 12 , further comprising forming a high-voltage second-type well between the second-type buried layer, the first-type guard ring, the cathode region, and the anode region.

14. The method of claim 11 , further comprising:

forming a high-voltage deep first-type well;

forming a high-voltage first-type lightly doped drain;

forming the first-type well;

forming a first-type lightly doped drain; and

forming the first-type doping region for forming the first-type guard ring.

15. The method of claim 11 , further comprising:

forming the high-voltage second-type lightly doped drain; and

forming a second-type doping region in the high-voltage second-type lightly doped drain for forming the anode region.

16. The method of claim 11 , further comprising:

forming a high-voltage second-type well in the substrate;

forming a second-type well in the high-voltage second-type well; and

forming a second-type doping region in the second-type well for forming a second-type guard ring surrounding the first-type guard ring.

17. The method of claim 11 , further comprising:

forming an isolation structure between the cathode region and the anode region, and between the anode region and the first-type guard ring.

18. The method of claim 11 , further comprising:

forming a dielectric layer on the substrate;

forming an opening in the dielectric layer to expose the high-voltage second-type lightly doped drain;

sputtering a first metal layer in the opening;

performing an anneal process;

depositing a second metal layer in the opening;

depositing a third metal layer in the opening; and

performing a planarizing process for forming a contact plug contacting the high-voltage second-type lightly doped drain.

19. The method of claim 18 , wherein the first metal layer comprises Ti or TiN, the second metal layer comprises TiN, and the third metal layer comprises W.

20. The method of claim 11 , wherein the first-type is n-type and the second-type is p-type.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2014
From: LIAO, WEI-SHAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 032188/0568 →
Continuity (1)
Related Publication 20150228808A1 · Aug 13, 2015