Semiconductor device
A semiconductor device having high breakdown voltage and high reliability without forming an embedded injection layer with high position accuracy. The semiconductor device includes a base as an active area of a second conductivity type formed on a surface layer of a semiconductor layer of a first conductivity type to constitute a semiconductor element; guard rings as a plurality of first impurity regions of the second conductivity type formed on the surface layer of the semiconductor layer spaced apart from each other to respectively surround the base in plan view; and an embedded injection layer as a second impurity region of the second conductivity type embedded in the surface layer of the semiconductor layer to connect at least two bottom portions of the plurality of guard rings.
1. A semiconductor device comprising:
an active area of a second conductivity type formed on a top surface of a semiconductor layer of a first conductivity type to constitute a semiconductor element;
a plurality of first regions of the second conductivity type formed on said semiconductor layer spaced apart from each other so as to respectively surround said active area in plan view; and
a second impurity region of the second conductivity type embedded in said semiconductor layer to connect at least two bottom portions of said plurality of first impurity regions,
wherein said second impurity region is connected to a bottom portion of said active area, and wherein a top surface of said second impurity region is not coplanar with the top surface of the semiconductor layer.
2. A semiconductor device comprising:
an active area of a second conductivity type formed on a top surface of a semiconductor layer of a first conductivity type to constitute a semiconductor element;
a plurality of first impurity regions of the second conductivity type formed on said semiconductor layer spaced apart from each other so as to respectively surround said active area in plan view; and
a second impurity region of the second conductivity type embedded in said semiconductor layer to connect at least two bottom portions of said plurality of first impurity regions,
wherein said second impurity region has an impurity concentration lower than said first impurity region, and
wherein a to surface of said second impurity region is not coplanar with the to surface of the semiconductor layer.
3. The semiconductor device according to claim 2 , wherein said second impurity region is connected to said active area.
4. The semiconductor device according to claim 2 , wherein said second impurity region is not connected to said active area.
5. The semiconductor device according to claim 2 , wherein said second impurity region is connected to all bottom portions of said plurality of first impurity regions.
6. The semiconductor device according to claim 5 , wherein said second impurity region is formed further to an outer side in plan view of said first impurity region surrounding said active area from an outermost side in plan view.
7. The semiconductor device according to claim 2 , wherein said first impurity regions are formed on said top surface of the semiconductor layer.
8. The semiconductor device according to claim 7 , further comprising a wiring layer connected to said active area on said first impurity region on an innermost side with an insulating film interposed therebetween.
9. The semiconductor device according to claim 2 , wherein said first impurity regions are formed by being embedded in said surface layer of the semiconductor layer.
10. The semiconductor device according to claim 9 , wherein said first impurity regions are formed by being embedded at a depth equal to that of said second impurity region.
11. The semiconductor device according to claim 2 , wherein said semiconductor element is a schottky barrier diode, and an end of said active area is an injection layer of the second conductivity type arranged at an end of a schottky electrode.
12. A semiconductor device comprising:
an active area of a second conductivity type formed on a surface layer of a semiconductor layer of a first conductivity type to constitute a semiconductor element;
a plurality of first impurity regions of the second conductivity type formed on said surface layer of the semiconductor layer spaced apart from each other so as to respectively surround said active area in plan view; and
a second impurity region of the second conductivity type embedded in said surface layer of the semiconductor layer to connect at least two bottom portions of said plurality of first impurity regions; and
a plurality of third impurity regions of the second conductivity type embedded in said surface layer of the semiconductor layer to be spaced apart from each other to respectively surround said first impurity regions in plan view.
13. The semiconductor device according to claim 12 , wherein said third impurity regions are embedded at a depth equal to that of said second impurity region.