IP Library Granted Patent US 9,209,801
Granted Patent B2
US 9,209,801 · App. 14/062,645 · Granted Dec 8, 2015

High frequency switch circuit including gate bias resistances

Inventor: Noriaki Matsuno (Kawasaki, JP)
Assignee: Renesas Electronics Corporation
H03K17/693
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Quick Facts
Patent No.
US 9,209,801
App. No.
14/062,645
Granted
Dec 8, 2015
Kind
B2
Abstract

N (n is an integer more than one) number of transistors are connected in series in an order from a first transistor to an n th transistor from a first terminal to a second terminal. First to n th nodes are connected to gates of the first to n th transistors. N number of resistance elements are connected in series in an order from a first resistance element to an n th resistance element from a bias terminal to the n th node. The first resistance element is connected between said bias terminal and said first node, and the k th resistance element (k=2 to n) is connected between the (k−1) th node and the k th node. Thus, a high frequency switch circuit can reduce an area of the whole gate bias resistances.

Claims (32)

1. A high frequency switch circuit comprising:

a first terminal;

a second terminal;

a bias terminal;

n (n is an integer more than one) number of transistors connected in series in an order from a first transistor to an n th transistor from said first terminal to said second terminal;

first to n th nodes connected to gates of said first to n th transistors; and

n number of resistance elements connected in series in an order from a first resistance element to an n th resistance element from said bias terminal to said n th node,

wherein said first resistance element is connected between said bias terminal and said first node,

wherein a k th resistance element (k=2 to n) is connected between said (k−1) th node and said k th node, and

wherein a gate current value of a k th transistor is identical to a gate current value of a (k−1) th transistor.

2. The high frequency switch circuit according to claim 1 , wherein said n th node is not connected to said second terminal through any element other than said n th transistor.

3. The high frequency switch circuit according to claim 1 , wherein a resistance value of an l th resistance element (l is any of integers of 2 to n) is greater than a resistance value of an (l−1) th resistance element.

4. The high frequency switch circuit according to claim 3 , wherein the resistance values decrease in an order of from said n th resistance element to said first resistance element.

5. The high frequency switch circuit according to claim 1 , further comprising:

a back gate bias terminal;

first to n th back gate nodes respectively connected to back gates of said first to n th transistors; and

n number of back gate resistance elements connected in series in an order from a first back gate resistance element to an n th back gate resistance element from said back gate bias terminal to said n th back gate node,

wherein said first back gate resistance element is connected between said back gate bias terminal and said first back gate node, and

a k th back gate resistance element (k=2 to n) is connected between a (k−1) th back gate node and a k th back gate node.

6. The high frequency switch circuit according to claim 1 , wherein said first terminal comprises a ground terminal to which a ground potential is applied, and

wherein said second terminal comprises a high frequency signal terminal to which a high frequency signal is applied.

7. The high frequency switch circuit according to claim 1 , wherein said n th node is connected to said second terminal only through said n th transistor.

8. The high frequency switch circuit according to claim 1 , wherein n is an integer greater than 2.

9. The high frequency switch circuit according to claim 1 , wherein a resistance value of said kth resistance element is set so that a gate current value of a k th transistor is identical to a gate current value of a (k−1) th transistor.

10. The high frequency switch circuit according to claim 1 , wherein a capacitance value between a source and the gate of said k th transistor is identical to a capacitance value between a drain and the gate of said k th transistor.

11. The high frequency switch circuit according to claim 1 , wherein a voltage value of said k th node equals a voltage of said first terminal multiplied by (2k−1/2n).

12. A semiconductor device comprising:

n (n is an integer more than one) number of transistors connected in series;

first to n th nodes connected to gates of said first to n th transistors, respectively; and

n number of resistance elements connected in series in an order from a first resistance element to an n th resistance element,

wherein said first resistance element is connected to said first node, and

wherein a gate current value of one of said n number of transistors is equal to a gate current value of another one of said n number of transistors.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2013
From: MATSUNO, NORIAKI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 031591/0834 →
Priority Claims (1)
JP 2012-242174 · Nov 1, 2012 · national
Continuity (1)
Related Publication 20140118053A1 · May 1, 2014