IP Library › Granted Patent US 9,214,905
Granted Patent B2
US 9,214,905 · App. 14/364,575 · Granted Dec 15, 2015

High output power amplifier

Inventor: Toshiyuki Okajima (Shiga, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
H03F3/213H03F1/0261H03F1/523H03F3/193H03F3/195H03F3/245H03F3/72H03F2200/108H03F2200/15H03F2200/18H03F2200/181H03F2200/451H03F2200/471H03F2200/555H03F2203/7206H03F2203/7221H03F2203/7227
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Quick Facts
Patent No.
US 9,214,905
App. No.
14/364,575
Granted
Dec 15, 2015
Kind
B2
Abstract

A high-output electric power amplifier using a depression-type FET includes a drain voltage supply portion adapted to create a positive voltage to be applied to a drain terminal in the depression-type FET, and a gate bias voltage supply portion adapted to create a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source, in order to certainly prevent breakdowns of the FET due to excessive electric currents.

Claims (21)

1. A high-output electric power amplifier configured to include a depression-type FET as an amplification device, the high-output electric power amplifier comprising:

a drain voltage supply portion adapted to create and output a positive voltage to be applied to a drain terminal in the depression-type FET; and

a gate bias voltage supply portion adapted to create and output a negative voltage to be applied to a gate terminal in the depression-type FET,

wherein the high-output electric power amplifier is configured that the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source.

2. The high-output electric power amplifier according to claim 1 , wherein

the gate bias voltage supply portion includes

a battery forming an electric power source for a gate bias voltage,

a transformer circuit and a smoothing circuit which are adapted to create a negative voltage to be applied to the gate terminal in the depression-type FET, from an output voltage from the battery, and

a gate bias voltage monitoring portion adapted to monitor the gate bias voltage applied to the gate terminal in the depression-type FET, which is created by the transformer circuit and the smoothing circuit,

the drain voltage supply portion includes

a rectification circuit, a transformer circuit and a smoothing circuit which are adapted to create a positive voltage to be applied to the drain terminal in the depression-type FET, from electric power supplied from the external commercial power supply, and

a drain voltage output ON/OFF portion which is adapted to turn on/off the output of the positive voltage applied to the drain terminal in the depression-type FET, which is created by the rectification circuit, the transformer circuit and the smoothing circuit,

the gate bias voltage monitoring portion is adapted to output, to the drain voltage output ON/OFF portion, a control signal indicative of the fact that the gate bias voltage is normal, when the gate bias voltage applied to the gate terminal in the depression-type FET falls within a predetermined permissible range, and

the drain voltage output ON/OFF portion is adapted to output the drain voltage, only when receiving the control signal outputted from the gate bias voltage monitoring portion.

3. The high-output electric power amplifier according to claim 2 , wherein

the drain voltage output ON/OFF portion is configured to employ, as an opening/closing device, a contact relay adapted to be closed only in a state where a control signal is inputted to an opening/closing control terminal.

4. The high-output electric power amplifier according to claim 2 , wherein

the gate bias voltage supply portion includes a rechargeable battery forming an electric power source for the gate bias voltage,

a charging circuit adapted to charge the rechargeable battery, and

a battery-level monitoring portion adapted to monitor an output voltage from the rechargeable battery, and wherein

the charging circuit is connected to the external commercial power supply and is adapted to perform an operation for charging the rechargeable battery, when the value from the battery-level monitoring portion reaches a first value.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2014
From: OKAJIMA, TOSHIYUKI
To: PANASONIC CORPORATION
Reel/Frame 033481/0101 →
Priority Claims (1)
JP 2011-274167 · Dec 15, 2011 · national
Continuity (1)
Related Publication 20140300422A1 · Oct 9, 2014