Fin structure of semiconductor device

1. A method of forming a semiconductor device, the method comprising:

forming a plurality of trenches in a substrate, portions of the substrate between neighboring trenches forming fins;

forming one or more liner layers along sidewalls of the plurality of trenches;

forming a first dielectric material over the one or more liner layers;

removing a first portion of the one or more liner layers and a first portion of the first dielectric material to expose upper portions of the fins;

forming dummy gates over channel regions of the fins;

forming a second dielectric material over the upper portions of the fins, the dummy gates being interposed between portions of the second dielectric material;

removing the dummy gates to form openings in the second dielectric material, the openings exposing portions of the fins; and

oxidizing exposed portions of the fins, thereby forming oxide regions on sidewalls of the fins, each oxide region extending above and below a plane defined by a corresponding sidewall.

2. The method of claim 1 , wherein a thickness of the oxide regions is between about 3nm and about 10nm.

3. The method of claim 1 , wherein a first fin of the fins comprises a first upper portion, a first lower portion, and a first middle portion interposed between the first upper portion and the first lower portion, the first upper portion and a first lower portion being formed of a first semiconductor material and the first middle portion being formed of a second semiconductor material, the first semiconductor material being different from the second semiconductor material.

4. The method of claim 1 , wherein the oxide regions comprise GeO x or SiGeO x .

5. The method of claim 1 , wherein the one or more liner layers comprise a first liner layer and a second liner layer over the first liner layer, the second liner layer comprising silicon nitride or aluminum oxide, and the first liner layer comprising silicon or silicon oxynitride.

6. The method of claim 5 , wherein the first liner layer has a first thickness between about 10 Åand about 30 Å, and wherein the second liner layer has a second thickness between about 20 Åand about 60 Å.

7. A method of forming a semiconductor device, the method comprising:

forming a first fin on a substrate, the first fin having a first upper portion, a first lower portion, and a first middle portion interposed between the first upper portion and the first lower portion;

forming one or more liner layers on a first sidewall of the first fin;

forming a first shallow trench isolation (STI) region adjacent the first sidewall of the first fin, the one or more liner layers being interposed between the first STI region and the first fin;

recessing the one or more liner layers and the first STI region to expose portions of the first upper portion and the first middle portion of the first fin; and

forming oxide regions on opposing sidewalls of the first middle portion of the first fin, the oxide regions extending toward each other such that a portion of the first middle portion of the first fin between the oxide regions is narrower than the first upper portion of the first fin.

8. The method of claim 7 , further comprising:

forming a second fin on the substrate, the second fin having a second upper portion, a second lower portion, and a second middle portion interposed between the second upper portion and the second lower portion;

forming the one or more liner layers on a second sidewall of the second fin;

forming a second STI region adjacent a second sidewall of the second fin, the one or more liner layers being interposed between the second STI region and the second fin; and

replacing a portion of the second upper portion of the second fin with a first semiconductor material, the first semiconductor material being different from a second semiconductor material of the second upper portion of the second fin.

9. The method of claim 8 , wherein the first upper portion of the first fin, the first lower portion of the first fin, the second upper portion of the second fin and the second lower portion of the second fin comprise silicon, and wherein the first middle portion of the first fin and the second middle portion of the second fin comprise silicon germanium.

10. The method of claim 8 , wherein the first semiconductor material is silicon and the second semiconductor material is silicon germanium.

11. The method of claim 7 , wherein the oxide regions comprise GeO x or SiGeO x .

12. A method of forming a semiconductor device, the method comprising:

patterning a substrate to form a first fin and a second fin thereon;

forming one or more liner layers on a first sidewall of the first fin and on a second sidewall of the second fin;

forming a first dielectric material over the one or more liner layers;

patterning the one or more liner layers and the first dielectric material to expose the first fin and the second fin;

forming a first dummy gate over the first fin;

forming a second dummy gate over the second fin;

forming a second dielectric material over the first fin and the second fin, a portion of the second dielectric material being interposed between the first dummy gate and the second dummy gate;

removing the first dummy gate to form a first opening in the second dielectric material, the first opening exposing a first portion of the first fin;

removing the second dummy gate to form a second opening in the second dielectric material, the second opening exposing a second portion of the second fin;

oxidizing the first portion of the first fin to form a first oxide region on a first sidewalls of the first portion and a second oxide region on a second sidewall of the first portion, the first sidewall being opposite of the second sidewall, the first oxide region and the second oxide region extending into the first portion of the first fin; and

replacing an upper portion of the second portion of the second fin.

13. The method of claim 12 , wherein replacing the upper portion of the second portion of the second fin comprises:

removing the upper portion of the second portion of the second fin to form a recess in the second fin; and

epitaxially growing a first semiconductor material in the recess, the first semiconductor material being different from a second semiconductor material of the upper portion of the second portion of the second fin.

14. The method of claim 12 , wherein the first oxide region and the second oxide region contact the one or more liner layers.

15. The method of claim 12 , further comprising:

forming a first gate in the first opening; and

forming a second gate in the second opening.

16. The method of claim 15 , wherein the first oxide region and the second oxide region contact the first gate.

17. The method of claim 15 , wherein the one or more liner layers are separated from the second gate.

18. The method of claim 12 , wherein topmost surfaces of the first oxide region and the second oxide region are lower than a topmost surface of the first fin.

19. The method of claim 12 , further comprising forming a hard mask layer over the second portion of the second fin before oxidizing the first portion of the first fin.

20. The method of claim 12 , wherein oxidizing the first portion of the first fin comprises exposing the first portion of the first fin to H 2 O vapor for a period from about 10 mins to about 60 mins at a temperature from about 400 ° C. to about 600 ° C. and at a pressure from about 1 atm to about 20 atm.