IP Library Granted Patent US 9,226,410
Granted Patent B2
US 9,226,410 · App. 14/375,824 · Granted Dec 29, 2015

Method of making a flexible circuit

Inventor: Philip Johnston (Cheltenham, GB)
Assignee: TRACKWISE DESIGNS LIMITED
H05K3/4611B32B37/1027H05K1/0298H05K1/115H05K3/06H05K3/064H05K3/4635H05K3/4644B32B2457/08H05K3/462H05K3/4617H05K3/4638H05K2201/09063H05K2203/068H05K2203/1545H05K2203/167
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Quick Facts
Patent No.
US 9,226,410
App. No.
14/375,824
Granted
Dec 29, 2015
Kind
B2
Abstract

A method of manufacturing a multilayer flexible circuit comprises providing first and second flexible substrates, each comprising a conductor layer and an insulator layer. The conductor layer of the first substrate is a patterned conductor layer. The first and second substrates are laminated together using a double belt press through which the substrates move in a continuous process. The method may include patterning the conductor layer of the first substrate and/or the conductor layer of the second substrate using an etching method that includes exposing a dry film resist on the conductor layer to a pattern by carrying out a plurality of exposures of adjacent and/or overlapping areas.

Claims (43)

1. A method of manufacturing a multilayer flexible circuit, comprising:

providing first and second flexible substrates, each comprising a conductor layer and an insulator layer, the conductor layer of the first substrate being a patterned conductor layer;

fixing together the first and second substrates;

laminating the fixed first and second substrates together using a double belt press through which the substrates move in a continuous process; and

patterning the conductor layer of the first substrate, the second substrate, or the first substrate and the second substrateby:

laminating a resist onto the conductor layer;

exposing the resist to a pattern, wherein exposing comprises carrying out a plurality of exposures over adjacent areas of the resist layer, which adjacent exposures together define a single circuit;

developing the resist;

etching the conductor layer, thereby patterning it in correspondence to the developed resist; and

stripping the resist layer.

2. The method of claim 1 , wherein the double belt press includes an isobaric region.

3. The method of claim 1 , wherein the double belt press includes an isochoric region.

4. The method of claim 1 , wherein the first substrate is provided with alignment features which are used for subsequent alignment of another layer, substrate and/or subsequent process.

5. The method of claim 4 , wherein the alignment features comprise through holes.

6. The method of claim 4 , wherein the alignment features are provided at either end of the first substrate.

7. The method of claim 4 , wherein the alignment features are provided at regular intervals along the length of the substrate.

8. The method of claim 1 , further comprising the step of aligning the first and second substrates prior to laminating them together.

9. The method of claim 8 , wherein the first substrate is provided with alignment features which are used for subsequent alignment of another layer, substrate and/or subsequent process, and wherein aligning comprises using the alignment features.

10. The method of claim 1 , wherein fixing comprises locally welding the first substrate to the second substrate.

11. The method of claim 1 , wherein an outer conductor layer is arranged with the first and second substrate and subsequently laminated together with them, to form an outer conductor layer of the flexible circuit.

12. The method of claim 1 , wherein exposing comprises using laser direct imaging.

13. The method of claim 12 , comprising moving the substrate under a stationary laser direct imaging device to expose the resist in a continuous process.

14. The method of claim 13 , wherein the substrate is moved in a stepwise manner under a laser direct imaging device to expose the resist.

15. The method of claim 12 , wherein a laser direct imaging device is moved over a stationary substrate.

16. The method of claim 1 , wherein alignment features are patterned in the conductor layer.

17. The method of claim 16 , wherein the alignment features in the conductor layer are used in aligning patterning of a subsequent conductor layer.

18. The method of claim 1 , wherein the patterned conductor layer comprises a plurality of separate regions of conductor.

19. The method of claim 1 , wherein the patterned conductor layer is at least one of: discontinuous; irregular; and not self supporting.

20. The method of claim 1 , wherein the patterned conductor layer is arranged to form a circuit.

21. The method of claim 1 , wherein each part of the substrate is subjected to a predetermined cycle of heat and pressure during lamination.

22. The method of claim 21 , wherein the cycle has a duration of at least 10 minutes.

23. The method of claim 22 , wherein the cycle has a duration of at least 1 hour.

24. The method of claim 21 , wherein the press comprises a plurality of regions, each region imparting a predetermined temperature and/or pressure to the substrate during lamination.

25. The method of claim 21 , wherein a central region of the press imparts a temperature and pressure that is higher than that imparted by a region adjacent to the entrance of the press, and/or higher than that imparted by a region adjacent to the exit of the press.

26. The method of claim 1 , wherein the conductor layer of the second substrate is patterned prior to laminating the first and second substrate together.

27. The method of claim 1 , wherein the conductor layer of the second substrate is patterned after laminating the first and second substrate together.

28. The method of claim 11 , wherein the outer conductor layer is patterned after laminating the first and second substrate together.

29. The method of claim 1 , wherein the first and/or second substrate comprises a plurality of conducting layers.

30. The method of claim 1 , wherein the first and/or second substrate comprise double sided substrates, each double sided substrate comprising a first and second conducting layer, with an insulating layer there between.

31. The method of claim 1 , wherein at least three substrates are laminated together.

32. The method of claim 1 , wherein a bondfilm is disposed between adjacent substrates and/or layers before laminating them together.

33. The method of claim 11 , wherein the outer conductor layer is patterned after it is laminated together with the first and second substrate.

34. The method of claim 1 , wherein the step of exposing the resist to a pattern, comprises aligning individual photomasks over each adjacent area of the resist layer, and exposing the aligned individual photomasks so as to expose a composite pattern that is longer than the pattern of each photomask.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NUMBER AGAINST WHICH THE ASSIGNMENT IS RECORDED PREVIOUSLY RECORDED ON REEL 033665 FRAME 0168. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 29, 2015
From: JOHNSTON, PHILIP
To: TRACKWISE DESIGNS LIMITED
Reel/Frame 034840/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2014
From: JOHNSTON, PHILIP
To: TRACKWISE DESIGNS LIMITED
Reel/Frame 033665/0168 →
Priority Claims (1)
GB 1201806.5 · Feb 2, 2012 · national
Continuity (1)
Related Publication 20150108084A1 · Apr 23, 2015