Output matching network for wideband power amplifier with harmonic suppression
View Patent ↗A wideband harmonic trap includes a first resonant tank in the form of a parallel LC circuit, and a second resonant tank in the form of a series LC circuit. The LC circuits are connected to a common input, an output of the parallel LC circuit is connected to a load and to ground via a shunt capacitor, and an output of the series LC circuit is connected to the ground.
1. An apparatus, comprising:
a first resonant tank comprising:
a parallel LC circuit, wherein L represents an inductor and C represents a capacitor;
a second resonant tank, comprising:
a series LC circuit;
a shunt capacitor, wherein the parallel and series LC circuits are connected to a common input, an output of the parallel LC circuit is connected to a load and to ground via the shunt capacitor, and an output of the series LC circuit is connected to the ground to form a wideband harmonic trap optimized from a sixth-order band-stop filter and provides a highest attenuation in a high-frequency pass-band compared to both fourth-order and sixth-order band-stop filters topology.
2. The apparatus of claim 1 , wherein the wideband harmonic trap is combined with a wideband output matching network for a wideband power amplifier.
3. The apparatus of claim 1 , wherein the common input is a transistor.
4. The apparatus of claim 1 , wherein the apparatus is used in a mobile transceiver for cellular telephony.
5. The apparatus of claim 1 , wherein multiple wideband harmonic traps are connected in series.
6. The apparatus of claim 1 , wherein the load includes an antenna.
7. The apparatus of claim 3 , further comprising:
a second shunt impedance matching capacitor, connected between the parallel and series LC circuits, to transforms an impedance, normally 50 ohm, of the wideband harmonic trap, to an optimum load impedance of the transistor over an entire operation frequency range.