IP Library Granted Patent US 9,235,426
Granted Patent B2
US 9,235,426 · App. 13/613,605 · Granted Jan 12, 2016

Multicore processor system, computer product, and notification method for updating operating system

Inventors: Koichiro Yamashita (Hachioji, JP); Hiromasa Yamauchi (Kawasaki, JP); Kiyoshi Miyazaki (Machida, JP)
Assignee: FUJITSU LIMITED
G06F9/4405G06F9/441
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Quick Facts
Patent No.
US 9,235,426
App. No.
13/613,605
Granted
Jan 12, 2016
Kind
B2
Abstract

A multicore processor system includes a processor configured to detect, among cores that have booted with an old boot program in the multicore processor, a core to which no process is assigned; change upon detecting a core to which no process is assigned, a reference area from a storage area for the old boot program to a storage area for a new boot program; and notify the core to which no process is assigned of a reboot instruction specifying the reference area after the change.

Claims (25)

1. A multicore processor system comprising a processor configured to:

detect, among cores that have booted with an old boot program in the multicore processor, a core to which no process is assigned,

change upon detecting the core to which no process is assigned, a reference area from a storage area for the old boot program to a storage area for a new boot program,

notify the core to which no process is assigned of a reboot instruction specifying the reference area after the change,

set upon receiving an instruction to update the new boot program, the storage area for the new boot program based on the storage area for the old boot program and a given mask value,

receive, after setting the storage area for the new boot program, an input of an access of the storage area for the old boot program, related to a download of the new boot program, and

determine whether the received access is a write access or a read access, and upon determining the access to be the write access, changes an address specified in the write access to an address specifying the storage area for the new boot program based on the given mask value and notifies an accessor of the write access of an instruction to access the address after the change, and upon determining the access to be the read access, notifies an accessor of the read access of an instruction to access an address specified in the read access.

2. The multicore processor system according to claim 1 , wherein

the processor upon not detecting a core to which no process is assigned, detects a core that has completed all processes assigned to the core, and upon detecting a core that has completed the processes, changes the reference area from the storage area for the old boot program to the storage area for the new boot program.

3. A multicore processor system comprising a plurality of cores, a storage unit storing a first boot program executed by the plurality of cores and a boot address that is accessed by the plurality of cores when the plurality of cores boot up, and a shared memory shared by the plurality of cores, wherein a first core of the plurality of cores is configured to:

write a second boot program to a storage area different from a storage area for the first boot program in the storage unit;

change a reference area that is referred when a second core reboots, by the second core to which no process is assigned, among the plurality of cores booted by the first boot program, from the storage area for the first boot program to a storage area for a second boot program;

notify to the second core of a reboot instruction specifying the reference area after the change; and

set, when an access request is requested for the storage area assigned to the second core in the shared memory while the second core notified of the reboot instruction is booting up, a priority information concerning the second core to LOW, the priority information indicating priority of each core for accessing the shared memory.

4. The multicore processor system according to claim 3 , wherein

the first core upon giving notification of the reboot instruction, changes the address specifying the storage area for the first boot program and stored in a master boot record of a storage device to the address specifying the storage area for the second boot program based on the given mask value.

5. The multicore processor system according to claim 3 , wherein the first core is configured to:

set upon receiving an instruction to update the second boot program, the storage area for the second boot program based on the storage area for the first boot program and a given mask value,

receive, after setting the storage area for the second boot program, an input of an access of the storage area for the first boot program, related to a download of the second boot program, and

determine whether the received access is a write access or a read access, and upon determining the access to be the write access, changes an address specified in the write access to an address specifying the storage area for the second boot program based on the given mask value and notifies an accessor of the write access of an instruction to access the address after the change, and upon determining the access to be the read access, notifies an accessor of the read access of an instruction to access an address specified in the read access.

6. A method for controlling a multicore processor system comprising a plurality of cores, a storage unit storing a first boot program executed by the plurality of cores and a boot address that is accessed by the plurality of cores when the plurality of cores boot up, and a shared memory shared by the plurality of cores, wherein the method comprising:

writing, by a first processor, a second boot program to a storage area different from a storage area for the first boot program in the storage unit;

changing, by the first processor, a reference area that is referred when a second core reboots, by the second core to which no process is assigned, among the plurality of cores booted by the first boot program, from the storage area for the first boot program to a storage area for a second boot program;

notifying, by the first processor, to the second core of a reboot instruction specifying the reference area after the change; and

setting, by the first processor, when an access request is requested for the storage area assigned to the second core in the shared memory while the second core notified of the reboot instruction is booting up, a priority information concerning the second core to LOW, the priority information indicating priority of each core for accessing the shared memory.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: YAMASHITA, KOICHIRO; YAMAUCHI, HIROMASA; MIYAZAKI, KIYOSHI
To: FUJITSU LIMITED
Reel/Frame 029047/0521 →
Continuity (2)
Continuation PCTJP2010054606 · Mar 17, 2010
Related Publication 20130007439A1 · Jan 3, 2013