IP Library › Granted Patent US 9,236,508
Granted Patent B2
US 9,236,508 · App. 14/312,836 · Granted Jan 12, 2016

Solid-state image pickup element and image pickup apparatus

Inventor: Shinya Yamakawa (Kanagawa, JP)
Assignee: SONY CORPORATION
H01L31/02327H01L27/1461H01L27/14603H01L27/14641H01L27/14689H01L31/06H01L27/1463
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Quick Facts
Patent No.
US 9,236,508
App. No.
14/312,836
Granted
Jan 12, 2016
Kind
B2
Abstract

Disclosed herein is a solid-state image pickup element, including: a photoelectric conversion region; a transistor; an isolation region of a first conductivity type configured to isolate the photoelectric conversion region and the transistor from each other; a well region of the first conductivity type having the photoelectric conversion region, the transistor, and the isolation region of the first conductivity type formed therein; a contact portion configured to supply an electric potential used to fix the well region to a given electric potential; and an impurity region of the first conductivity type formed so as to extend in a depth direction from a surface of the isolation region of the first conductivity type in the isolation region of the first conductivity type between the contact portion and the photoelectric conversion region, and having a sufficiently higher impurity concentration than that of the isolation region of the first conductivity type.

Claims (43)

1. A solid-state image pickup element, comprising:

a plurality of photoelectric conversion regions;

a respective transfer transistor for each photoelectric conversion region;

a transistor in common for the photoelectric conversion regions;

an isolation region of a first conductivity type isolating said photoelectric conversion regions and said transistors from each other;

a well region of the first conductivity type having said photoelectric conversion regions, said transistor, and said isolation region formed therein;

a contact portion formed on said isolation region via which an electric potential that fixes said well region to a given electric potential can be supplied; and

an impurity region of the first conductivity type in said isolation region and between said contact portion and said photoelectric conversion regions, said impurity region formed so as to extend in a depth direction from a surface of said isolation region and having a higher impurity concentration than that of said isolation region,

wherein,

in plan view, said isolation region is formed so as to have a planar pattern including therein a region of a second conductivity type of said transistor, and said contact portion, and

in plan view, said impurity region is between the region of the second conductivity type of said transistor and said contact portion.

2. A solid-state imaging device, comprising:

a substrate;

a well region of a first conductivity type in the substrate;

a plurality of photoelectric conversion regions in the well region;

an isolation region of the first conductivity type in the well region and separating the photoelectric conversion regions from each other;

a floating diffusion, an amplifier transistor, a select transistor and a reset transistor shared by at least two of the photoelectric conversion regions;

a contact portion on the isolation region via which an electric potential can be supplied to the well region to fix the well region to the potential; and

an impurity region of the first conductivity type in the first isolation region of the first conductivity type and between said contact portion and said photoelectric conversion regions, said impurity region formed so as to extend in a depth direction from a surface of said isolation region and having a higher impurity concentration than that of said isolation region,

wherein,

the amplifier transistor and the select transistor are disposed in the isolation region,

in plan view, said isolation region is formed so as to have a planar pattern including therein a region of a second conductivity type of said transistor, and said contact portion,

in plan view, said impurity region is between the region of the second conductivity type of said transistor and said contact portion, and

the contact portion, the select transistor and the amplifier transistor are disposed along a same line between two adjacent rows of said photoelectric conversion regions.

3. The solid-state imaging device of claim 2 , further comprising a first conductivity type region beneath the isolation region.

4. The solid-state imaging device of claim 2 , wherein the amplifier transistor and the reset transistor are connected to a same power source.

5. The solid-state imaging device of claim 2 , wherein the impurity region is a P+ barrier region.

6. A electronic device that comprises a solid-state imaging device, the solid-state imaging device comprising:

a substrate;

a well region of a first conductivity type in the substrate;

a plurality of photoelectric conversion regions in the well region;

an isolation region of the first conductivity type in the well region and separating the photoelectric conversion regions from each other;

a floating diffusion, an amplifier transistor, a select transistor and a reset transistor shared by at least two of the photoelectric conversion regions;

a contact portion on the isolation region and configured to supply an electric potential to fix the well region to the potential; and

an impurity region of the first conductivity type in the first isolation region and between said contact portion and said photoelectric conversion regions, said impurity region formed so as to extend in a depth direction from a surface of said isolation region and having a higher impurity concentration than that of said isolation region,

wherein,

the amplifier transistor and the select transistor are disposed in the isolation region,

in plan view, said isolation region is formed so as to have a planar pattern including therein a region of a second conductivity type of said transistor, and said contact portion,

in plan view, said impurity region is between the region of the second conductivity type of said transistor and said contact portion, and

the well contact, the select transistor and the amplifier transistor are disposed along a same line between two adjacent rows of said photoelectric conversion regions.

7. The electronic device of claim 6 , wherein the solid-state imaging device further comprises a first conductivity type region beneath the isolation region.

8. The electronic device of claim 6 , wherein the amplifier transistor and the reset transistor are connected to a same power source.

9. The electronic device of claim 6 , wherein the isolation region is a P region and the impurity region is a P+ region.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA PREVIOUSLY RECORDED ON REEL 033332 FRAME 0016. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 4, 2014
From: YAMAKAWA, SHINYA
To: SONY CORPORATION
Reel/Frame 033464/0810 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2014
From: TAMAKAWA, SHINYA
To: SONY CORPORATION
Reel/Frame 033332/0016 →
Priority Claims (1)
JP 2010-075400 · Mar 29, 2010 · national
Continuity (2)
Continuation 13053427 · Mar 22, 2011
Related Publication 20140299954A1 · Oct 9, 2014