IP Library › Granted Patent US 9,246,009
Granted Patent B2
US 9,246,009 · App. 14/684,774 · Granted Jan 26, 2016

Semiconductor device and method for manufacturing the same

Inventors: Yoshiaki Oikawa (Tochigi, JP); Masayuki Kajiwara (Tochigi, JP); Masataka Nakada (Tochigi, JP); Masami Jintyou (Tochigi, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78606H01L21/568H01L23/3107H01L23/3114H01L27/1214H01L27/1266H01L29/78666H01L29/78669H01L2924/0002H01L2924/12044H01L2924/19041
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Quick Facts
Patent No.
US 9,246,009
App. No.
14/684,774
Granted
Jan 26, 2016
Kind
B2
Abstract

An object is to improve water resistance and reliability of a semiconductor device by reducing the degree of peeling of a film. In a semiconductor device, a first inorganic insulating layer, a semiconductor element layer, a second inorganic insulating layer, an organic insulating layer, and a third inorganic insulating layer are sequentially stacked over a substrate. The second inorganic insulating layer is in contact with the first inorganic insulating layer in an opening portion provided in the semiconductor element layer. The third inorganic insulating layer is in contact with the second inorganic insulating layer in an opening portion provided in the organic insulating layer. In a region where the second inorganic insulating layer and the third inorganic insulating layer are in contact with each other, the second inorganic insulating layer has a plurality of irregularities or openings.

Claims (30)

1. A semiconductor device comprising:

a first inorganic insulating layer, a semiconductor element layer, a second inorganic insulating layer, an organic insulating layer, and a third inorganic insulating layer that are sequentially stacked over a substrate,

wherein the second inorganic insulating layer is in contact with the first inorganic insulating layer in a first opening portion provided in the semiconductor element layer,

wherein the third inorganic insulating layer is in contact with the second inorganic insulating layer in a second opening portion provided in the organic insulating layer, and

wherein in a region where the second inorganic insulating layer and the third inorganic insulating layer are in contact with each other, a surface of the second inorganic insulating layer has a plurality of irregularities.

2. The semiconductor device according to claim 1 , wherein each of the first inorganic insulating layer, the second inorganic insulating layer, and the third inorganic insulating layer contains one of silicon nitride and silicon nitride oxide.

3. The semiconductor device according to claim 1 , wherein the semiconductor element layer includes a thin film transistor.

4. The semiconductor device according to claim 1 , wherein in a region where the third inorganic insulating layer overlaps with the plurality of irregularities of the second inorganic insulating layer, a surface of the third inorganic insulating layer has a plurality of irregularities.

5. The semiconductor device according to claim 1 , wherein the semiconductor device further comprises a conductive layer electrically connected to the semiconductor element layer in a third opening portion provided in the organic insulating layer and the second inorganic insulating layer.

6. The semiconductor device according to claim 1 , wherein the substrate is a flexible substrate.

7. A semiconductor device comprising:

a first inorganic insulating layer, a semiconductor element layer, a second inorganic insulating layer, an organic insulating layer, and a third inorganic insulating layer that are sequentially stacked over a substrate,

wherein the second inorganic insulating layer is in contact with the first inorganic insulating layer in a first opening portion provided in the semiconductor element layer,

wherein the third inorganic insulating layer is in contact with the second inorganic insulating layer in a second opening portion provided in the organic insulating layer,

wherein in a region where the second inorganic insulating layer and the third inorganic insulating layer are in contact with each other, a plurality of opening portions are formed in the second inorganic insulating layer, and

wherein the first inorganic insulating layer and the third inorganic insulating layer are in contact with each other in the plurality of opening portions.

8. The semiconductor device according to claim 7 , wherein each of the first inorganic insulating layer, the second inorganic insulating layer, and the third inorganic insulating layer contains one of silicon nitride and silicon nitride oxide.

9. The semiconductor device according to claim 7 , wherein the semiconductor element layer includes a thin film transistor.

10. The semiconductor device according to claim 7 , wherein in a region where the third inorganic insulating layer overlaps with the plurality of opening portions, a surface of the third inorganic insulating layer has a plurality of irregularities.

11. The semiconductor device according to claim 7 , wherein the semiconductor device further comprises a conductive layer electrically connected to the semiconductor element layer in a third opening portion provided in the organic insulating layer and the second inorganic insulating layer.

12. The semiconductor device according to claim 7 , wherein the substrate is a flexible substrate.

13. A semiconductor device comprising:

a first inorganic insulating layer, a thin film transistor, a second inorganic insulating layer, an organic insulating layer, and a third inorganic insulating layer that are sequentially stacked over a substrate,

wherein the second inorganic insulating layer is in contact with the first inorganic insulating layer with the thin film transistor interposed therebetween,

wherein the third inorganic insulating layer is in contact with the second inorganic insulating layer with the organic insulating layer interposed therebetween, and

wherein in a region where the second inorganic insulating layer and the third inorganic insulating layer are in contact with each other, a surface of the second inorganic insulating layer has a plurality of irregularities.

14. The semiconductor device according to claim 13 , wherein each of the first inorganic insulating layer, the second inorganic insulating layer, and the third inorganic insulating layer contains one of silicon nitride and silicon nitride oxide.

15. The semiconductor device according to claim 13 , wherein in a region where the third inorganic insulating layer overlaps with the plurality of irregularities of the second inorganic insulating layer, a surface of the third inorganic insulating layer has a plurality of irregularities.

16. The semiconductor device according to claim 13 , wherein the semiconductor device further comprises a conductive layer electrically connected to the thin film transistor in an opening portion provided in the organic insulating layer and the second inorganic insulating layer.

17. The semiconductor device according to claim 13 , wherein the substrate is a flexible substrate.

Priority Claims (1)
JP 2008-109119 · Apr 18, 2008 · national
Continuity (2)
Division 12423563 · Apr 14, 2009
Related Publication 20150221777A1 · Aug 6, 2015