Through-assembly via modules and methods for forming the same
View Patent ↗A discrete Through-Assembly Via (TAV) module includes a substrate, and vias extending from a surface of the substrate into the substrate. The TAV module is free from conductive features in contact with one end of each of the conductive vias.
1. A method comprising:
forming a plurality of through-vias extending from a top surface of a substrate in a wafer into the substrate;
forming a plurality of through-strips extending from the top surface of the substrate into the substrate, wherein the plurality of through-strips is parallel to each other, and wherein lengths of the plurality of through-strips are greater than widths of the plurality of through-strips;
forming a plurality of redistribution lines over and connected to the plurality of through-vias;
performing a backside grinding on a back surface of the substrate; and
performing a die-saw on the wafer to cut the wafer into a plurality of dies.
2. The method of claim 1 further comprising, before the die-saw, forming electrical connections to interconnect the plurality of through-strips as a capacitor.
3. The method of claim 2 , wherein the electrical connections are portions of the plurality of redistribution lines.
4. The method of claim 1 , wherein surfaces of the through-vias are exposed after the backside grinding, and the die-saw is performed when the surfaces of the through-vias are exposed.
5. The method of claim 1 , wherein after the die-saw, the plurality of through-strips is electrically disconnected from each other.
6. The method of claim 1 , wherein the substrate is a dielectric substrate.
7. The method of claim 6 , wherein the plurality of through-vias and the plurality of through-strips are in contact with the dielectric substrate.
8. The method of claim 1 , wherein the substrate is a semiconductor substrate, and the method further comprises forming insulation layers to separate each of the plurality of through-vias and each of the plurality of through-strips from the semiconductor substrate.
9. A method comprising:
forming a plurality of through-strips extending from a top surface of a substrate in a wafer into the substrate;
forming a first plurality of redistribution lines over and connected to the plurality of through-strips, wherein the first plurality of redistribution lines electrically connect the plurality of through- strips as a capacitor; and
performing a die-saw on the wafer to cut the wafer into a plurality of dies.
10. The method of claim 9 further comprising performing a backside grinding on a back surface of the substrate before the die-saw.
11. The method of claim 10 , wherein the backside grinding is stopped before the plurality of through-strips is exposed.
12. The method of claim 9 , wherein the substrate is a dielectric substrate, and the plurality of through-strips is in contact with the dielectric substrate.
13. The method of claim 9 , wherein the substrate is a semiconductor substrate, and the method further comprises forming insulation layers to separate the plurality of through-strips from the semiconductor substrate.
14. The method of claim 9 further comprising:
forming a plurality of through-vias extending from a top surface of the substrate into the substrate; and
forming a second plurality of redistribution lines to electrically connect to the plurality of through-vias, wherein the first and the second plurality of redistribution lines are on opposite sides of the plurality of through-vias.
15. The method of claim 9 further comprising performing a backside grinding on the substrate, wherein the die-saw is performed when the plurality of through-strips is not exposed from a backside of the substrate.