Semiconductor device and method of manufacturing the same
A semiconductor device has a resistor area and wiring area selectively disposed on a semiconductor substrate. In this semiconductor device, a second interlayer insulating film is formed above the semiconductor substrate, and a thin-film resistor is disposed on the second interlayer insulating film in the resistor area. Vias that contact the thin-film resistor from below are formed in the second interlayer insulating film. A wiring line is disposed on the second interlayer insulating film in the wiring area. A dummy wiring line that covers the thin-film resistor from above is disposed in a third wiring layer that is in the same layer as the wiring line, and an insulating film is interposed between the thin-film resistor and the dummy wiring line.
1. A semiconductor device having a capacitor area and a wiring area selectively disposed on a semiconductor substrate, comprising:
an interlayer insulating film disposed above the semiconductor substrate;
a thin-film metal film that is disposed on the interlayer insulating film and that is in the capacitor area, the thin-film metal film serves as a bottom electrode of the capacitor;
a via that is formed in the interlayer insulating film and that contacts the thin-film metal film from below;
a wiring line that is disposed above the interlayer insulating film and that is in the wiring area;
a first dummy wiring line that is disposed in a wiring layer in the same layer as the wiring line and that covers the thin-film metal film from above, the first dummy wiring line serves as a top electrode of the capacitor; and
a capacitor dielectric film interposed between the thin-film metal film and the first dummy wiring line.
2. The semiconductor device according to claim 1 , wherein the first dummy wiring line includes overlapping parts that cover the thin-film metal film from sides thereof.
3. The semiconductor device according to claim 1 , wherein the capacitor dielectric film includes side walls that cover respective side faces of the thin-film metal film.
4. The semiconductor device according to claim 1 , further comprising a second interlayer capacitor dielectric film formed on the interlayer insulating film so as to cover the wiring line and the first dummy wiring line,
wherein the second interlayer insulating film has a via hole formed therein selectively exposing a top of the first dummy wiring line.
5. The semiconductor device according to claim 1 ,
wherein the capacitor dielectric film is an SiO2 film, and
wherein the semiconductor device further includes a TiN layer interposed between the first dummy wiring line and the SiO2 film.
6. The semiconductor device according to claim 1 ,
wherein the capacitor dielectric film is an SiO2 film, and
wherein the interlayer insulating film has, on an outermost surface thereof, an etching stopper made of an insulating material that has etching selectivity with respect to SiO2.
7. The semiconductor device according to claim 6 , wherein the etching stopper is made of an SiN film.
8. The semiconductor device according to claim 1 , wherein the thin-film metal film is made of SiCr, NiCr, TaN, or TiN.
9. The semiconductor device according to claim 1 , wherein the first dummy wiring line has a lamination structure that is same as the wiring line.
10. The semiconductor device according to claim 9 , wherein both of the first dummy wiring line and the wiring line have a multilayer configuration including an Al alloy wiring line and barrier films that respectively sandwich said Al alloy wiring line from above and below.
11. The semiconductor device according to claim 1 , further comprising a resistor area disposed on the semiconductor substrate,
wherein said resistor area includes:
a thin film resistor disposed on the interlayer insulating film;
a second dummy wiring line disposed in a wiring layer that is in the same layer as the wiring line, the second dummy wiring line facing the thin film resistor; and
an insulating film interposed between the thin film resistor and the second dummy wiring line.