Display, method for driving display, and electronic apparatus having parallel holding capacitors
Disclosed herein is a display including: a pixel array part configured to include pixels that are arranged in a matrix, each having an electro-optical element, a write transistor for writing a video signal, a drive transistor for driving the electro-optical element based on the video signal written by the write transistor, and a holding capacitor connected between the gate and source of the drive transistor, wherein the holding capacitor includes a first electrode, a second electrode disposed to face one surface of the first electrode for forming a first capacitor, and a third electrode disposed to face the other surface of the first electrode for forming a second capacitor, and the first capacitor and the second capacitor are connected in parallel to each other electrically.
1. A display device comprising:
a first substrate;
a pixel array including a plurality of pixels arranged in a matrix on the first substrate, respective ones of the pixels comprising a write transistor, a drive transistor configured to control a current based on a potential applied to a gate electrode of the drive transistor, and a first capacitor including a second electrode formed in a second metal layer; and
a second substrate arranged on the pixel array, wherein
the pixel array further comprises a second capacitor including a first electrode formed in a first metal layer and a third electrode formed in a third metal layer,
the first metal layer is disposed on the second metal layer with a first insulation layer sandwiched between the first metal layer and the second metal layer,
the third electrode is disposed to face the first electrode with at least a second insulation layer sandwiched between the first electrode and the third electrode,
a third insulation layer with an opening region is disposed between the second insulation layer and the third metal layer, and a majority of the opening region is overlapping with the first electrode,
a first surface of the first electrode faces the first substrate and a second surface of the first electrode faces the second substrate, and
the pixel array further comprises an electro-optical element which includes an electro-optical material layer, and the second substrate is bonded to the first substrate by an adhesive material so that the electro-optical material is sealed between the first substrate and the second substrate.
2. The display device according to claim 1 , wherein the third electrode is directly in contact with the second insulation layer at the opening region.
3. The display device according to claim 1 , wherein the electro-optical material layer is disposed on the third electrode at the opening region.
4. The display device according to claim 3 , wherein the electro-optical material layer comprises an organic light emitting material which is capable of emitting light in response to current flow.
5. The display device according to claim 3 , wherein a transparent conductive layer is commonly disposed on the electro-optical material layer corresponding to the plurality of pixels.
6. The display device according to claim 1 , wherein all of the opening region is overlapping with the first electrode.
7. The display device according to claim 1 , wherein the first electrode is electrically connected to the gate electrode of the drive transistor via a contact hole formed through the first insulation layer.
8. The display device according to claim 1 , wherein the third electrode extends over the third insulation layer in a region other than the opening region.
9. The display device according to claim 1 , wherein the third electrode has a recessed portion corresponding to the opening region.
10. A pixel array, comprising:
a first substrate;
a plurality of pixels arranged in a matrix on the first substrate, respective ones of the pixels comprising a write transistor, a drive transistor configured to control a current based on a potential applied to a gate electrode of the drive transistor, and a first capacitor including a second electrode formed in a second metal layer; and
a second substrate arranged on the pixel array, wherein
the pixel array further comprises a second capacitor including a first electrode formed in a first metal layer and a third electrode formed in a third metal layer,
the first metal layer is disposed on the second metal layer with a first insulation layer sandwiched between the first metal layer and the second metal layer,
the third electrode is disposed to face the first electrode with at least a second insulation layer sandwiched between the first electrode and the third electrode,
a third insulation layer with an opening region is disposed between the second insulation layer and the third metal layer, and a majority of the opening region is overlapping with the first electrode,
a first surface of the first electrode faces the first substrate and a second surface of the first electrode faces the second substrate, and
the pixel array further comprises an electro-optical element which includes an electro-optical material layer, and the second substrate is bonded to the first substrate by an adhesive material so that the electro-optical material is sealed between the first substrate and the second substrate.
11. The pixel array according to claim 10 , wherein a transparent conductive layer is commonly disposed over the third metal layer corresponding to the plurality of pixels.
12. The pixel array according to claim 10 , wherein all of the opening region is overlapping with the first electrode.
13. A pixel array comprising:
a plurality of pixels arranged in a matrix, respective ones of the pixels comprising a write transistor, a drive transistor configured to control a current based on a potential applied to a gate electrode of the drive transistor, and a first capacitor including a second electrode formed in a second metal layer, wherein
the pixel array further comprises a second capacitor including a first electrode formed in a first metal layer and a third electrode formed in a third metal layer,
the first metal layer is disposed on the second metal layer with a first insulation layer sandwiched between the first metal layer and the second metal layer,
the third electrode is disposed to face the first electrode with at least a second insulation layer sandwiched between the first electrode and the third electrode,
a third insulation layer with an opening region is disposed between the second insulation layer and the third metal layer, and a majority of the opening region is overlapping with the first electrode, and
the first electrode is electrically connected to the gate electrode of the drive transistor via a contact hole formed through the first insulation layer.
14. The pixel array according to claim 10 , wherein the third electrode extends over the third insulation layer in a region other than the opening region.
15. The pixel array according to claim 10 , wherein the third electrode has a recessed portion corresponding to the opening region.
16. The pixel array according to claim 13 , wherein a transparent conductive layer is commonly disposed over the third metal layer corresponding to the plurality of pixels.
17. The pixel array according to claim 13 , wherein all of the opening region is overlapping with the first electrode.
18. The pixel array according to claim 13 , wherein the third electrode extends over the third insulation layer in a region other than the opening region.
19. The pixel array according to claim 13 , wherein the third electrode has a recessed portion corresponding to the opening region.