IP Library › Granted Patent US 9,274,942
Granted Patent B2
US 9,274,942 · App. 13/235,394 · Granted Mar 1, 2016

Information processing system and nonvolatile storage unit

Inventor: Daisuke Hashimoto (Yokohama, JP)
Assignee: KABUSHIKI KAISHA TOSHIBA
G06F12/0246G06F2212/7209
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Quick Facts
Patent No.
US 9,274,942
App. No.
13/235,394
Granted
Mar 1, 2016
Kind
B2
Abstract

According to one embodiment, a memory system includes a nonvolatile storage device and an information processing apparatus. The information processing apparatus includes a first control circuit configured to send a delete notification to the nonvolatile storage device to invalidate data in a first logical address area when read data corresponding to the first logical address area is the same as data expressed by a first function. The nonvolatile storage device include a nonvolatile storage medium, a management table configured to associate a logical address corresponding to valid data for the nonvolatile storage device with a physical address, and a second control circuit configured to update the management table to invalidate a logical address designated by the delete notification, and to send the data expressed by the first function to the information processing apparatus when a logical address included in a read instruction received from the information processing apparatus is invalid.

Claims (55)

1. An information processing system comprising:

a nonvolatile storage unit and an information processing apparatus that communicates with the nonvolatile storage unit,

the nonvolatile storage unit comprising:

a nonvolatile storage medium; and

a first control unit configured to invalidate one or more mappings from a logical address region specified by a received delete notification to the nonvolatile storage medium, and to transmit data indicated by a first function to the information processing apparatus when a logical address region specified by a received read command is not mapped to the nonvolatile storage medium, and

the information processing apparatus comprising a second control unit configured:

to read data from a first logical address region of the nonvolatile storage unit,

to determine whether data read from the first logical address region is identical with the data indicated by the first function, and

to send the delete notification to the nonvolatile storage unit to invalidate one or more mappings from the first logical address region to the nonvolatile storage medium when the read data is identical with the data indicated by the first function.

2. The system of claim 1 , wherein the first function indicates fixed data independent from logical addresses sent to the nonvolatile storage unit.

3. The system of claim 1 , wherein

the nonvolatile storage medium includes a storage area that stores the first function, and

the second control unit rewrites the first function in the storage area to a second function, and

writes the data expressed by the first function to a second logical address region where read data read from the nonvolatile storage unit is same as the data indicated by the first function.

4. The system of claim 1 , wherein the second control unit executes processing concerning the delete notification upon receiving an instruction from a user.

5. The system of claim 1 , wherein the second control unit executes processing concerning the delete notification when a predetermined time has been reached.

6. The system of claim 1 , wherein

the first control unit sends an instruction to execute processing concerning the delete notification to the information processing apparatus, and

the second control unit executes the processing concerning the delete notification upon receiving the instruction from the nonvolatile storage unit.

7. The system of claim 1 , wherein the first function indicates different data for at least two different logical addresses sent to the nonvolatile storage unit.

8. A nonvolatile storage unit that communicates with an information processing apparatus, comprising:

a nonvolatile storage medium; and

a control unit configured:

to read data from a logical address region of the nonvolatile storage medium,

to determine whether the data read from the logical address region is identical with data indicated by a first function,

to invalidate one or more mappings from the logical address region to the nonvolatile storage medium when the read data is identical with the data indicated by the first function, and

to send data indicated by the first function to the information processing apparatus when one or more mappings from a logical address region included in a read command received from the information processing apparatus to the nonvolatile storage medium is invalid.

9. The unit of claim 8 , wherein the first function indicates fixed data independent from logical addresses received from the information processing apparatus.

10. The unit of claim 8 , wherein the control unit executes processing of invalidating mappings when no access is received from the information processing apparatus during a predetermined period.

11. The unit of claim 8 , wherein the control unit executes processing of invalidating mappings upon receiving an instruction from the information processing apparatus.

12. The unit of claim 8 , wherein the control unit executes processing of invalidating mappings when a free block count in the nonvolatile storage medium has fallen below a predetermined value.

13. The unit of claim 8 , wherein the first function indicates different data for at least two different logical addresses received from the information processing apparatus.

14. An information processing system comprising:

a nonvolatile storage unit and an information processing apparatus that communicates with the nonvolatile storage unit,

the nonvolatile storage unit comprising:

a nonvolatile storage medium;

a storage area configured to store first data; and

a first control unit configured to invalidate one or more mappings from a logical address region specified by a received delete notification to the nonvolatile storage medium, and to transmit the first data to the information processing apparatus when a logical address region specified by a received read command is not mapped to the nonvolatile storage medium; and

the information processing apparatus comprising a second control unit configured:

to read data from a first logical address region of the nonvolatile storage unit,

to determine whether data read from the first logical address region is identical with the first data, and

to send the delete notification to the nonvolatile storage unit to invalidate one or more mappings from the first logical address region to the nonvolatile storage medium when the read data is identical with the first data.

15. The system of claim 14 , wherein the first data indicates fixed data independent from logical addresses sent to the nonvolatile storage unit.

16. The system of claim 14 , wherein the first data indicates different data for at least two different logical addresses sent to the nonvolatile storage unit.

17. A nonvolatile storage unit that communicates with an information processing apparatus, comprising:

a nonvolatile storage medium;

a storage area configured to store first data; and

a control unit configured:

to read data from a logical address region of the nonvolatile storage medium,

to determine whether the data read from the logical address region is identical with the first data,

to invalidate one or more mappings from the logical address region to the nonvolatile storage medium when the read data is identical with the first data, and

to send the first data to the information processing apparatus when one or more mappings from a logical address region included in a read command received from the information processing apparatus to the nonvolatile storage medium is invalid.

18. The unit of claim 17 , wherein the first data indicates fixed data independent from logical addresses received from the information processing apparatus.

19. The unit of claim 17 , wherein the first data indicates different data for at least two different logical addresses received from the information processing apparatus.

20. The unit of claim 17 , wherein the control unit executes processing of invalidating mappings when a free block count in the nonvolatile storage medium has fallen below a predetermined value.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043328/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2011
From: HASHIMOTO, DAISUKE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027298/0241 →
Priority Claims (1)
JP 2011-063282 · Mar 22, 2011 · national
Continuity (1)
Related Publication 20120246388A1 · Sep 27, 2012