Reduced scalable cache directory

1. A processing network comprising:

a cache configured to store copies of memory data as a plurality of cache lines;

a cache controller configured to:

receive data requests from a plurality of cache agents; and

designate at least one of the cache agents as an owner of a first of the cache lines; and

a directory configured to store cache ownership designations of the first cache line,

wherein the directory is encoded to support substantially simultaneous ownership of the first cache line by a plurality but less than all of the cache agents, and

wherein the cache controller is further configured to invalidate ownership by at least one of the cache line owners when the cache controller receives a data request for ownership of the first cache line by a first of the cache agents and when the first cache line is owned by a maximum number of owners other than the first cache agent.

2. The processing network of claim 1 , wherein the directory comprises a table, wherein a maximum substantially simultaneous ownership is limited by a number of table columns, and wherein at least one of the columns comprises ownership data for a plurality of cache agents.

3. The processing network of claim 1 , wherein the directory comprises a table, wherein a maximum substantially simultaneous ownership is limited by a number of table rows, and wherein at least one of the rows comprises ownership data for a plurality of cache agents.

4. The processing network of claim 1 , wherein the directory is further encoded to limit substantially simultaneous ownership of any of the cache lines to a range of three owners to four owners.

5. A processing network comprising:

a cache configured to store copies of memory data as a plurality of cache lines;

a cache controller configured to:

receive data requests from a plurality of cache agents; and

designate at least one of the cache agents as an owner of a first of the cache lines; and

a directory configured to store cache ownership designations of the first cache line,

wherein the directory is encoded to support substantially simultaneous ownership of the first cache line by a plurality but less than all of the cache agents, and

wherein the cache controller is further configured to designate the cache line as a broadcast cache line when the cache controller receives a data request for ownership of the first cache line by a first of the cache agents and when the first cache line is owned by a maximum number of owners other than the first cache agent.

6. A processing network comprising:

a memory component configured to:

store copies of shared memory data as a plurality of cache lines;

receive data requests for the cache lines from a plurality of cache agents; and

maintain a directory to store cache ownership designations of the cache lines by the cache agents,

wherein the directory is encoded to substantially simultaneously designate ownership of any, but less than all, of the stored cache lines, and

wherein the directory is further encoded to limit a number of substantially simultaneously designated cache lines to a value associated with a combined memory space of the cache agents.

7. The processing network of claim 6 , wherein the directory is further encoded to limit a number of substantially simultaneously designated cache lines to a value greater than a maximum number of cache lines storable in a first of the cache agents and less than a maximum number of cache lines storable in all cache agents.

8. A processing network comprising:

a memory component configured to:

store copies of shared memory data as a plurality of cache lines;

receive data requests for the cache lines from a plurality of cache agents; and

maintain a directory to store cache ownership designations of the cache lines by the cache agents,

wherein the directory is encoded to substantially simultaneously designate ownership of any, but less than all, of the stored cache lines, and

wherein the memory is further configured to act as a home agent by invalidating ownership of a first cache line when the memory receives an ownership request for a second cache line and when the directory is full of designated cache lines.

9. A processing network comprising:

a memory component configured to:

store copies of shared memory data as a plurality of cache lines;

receive data requests for the cache lines from a plurality of cache agents; and

maintain a directory to store cache ownership designations of the cache lines by the cache agents,

wherein the directory is encoded to substantially simultaneously designate ownership of any, but less than all, of the stored cache lines,

wherein the memory is configured to act as a home agent, and

wherein the memory comprises an address map configured to store data directing home agent response behavior when a cache line cannot be found in the directory.

10. The processing network of claim 9 , wherein the address map indicates home agent response behavior by a memory region associated with the cache line that is not found in the directory.

11. The processing network of claim 9 , wherein the address map indicates that the unfound cache line should be treated as a cache line miss.

12. The processing network of claim 9 , wherein the address map indicates that the unfound cache line should be treated as a broadcast cache line.

13. A method comprising:

receiving coherent transactions from a plurality of cache agents; and

storing ownership designations of a plurality of cache lines by the cache agents in a directory,

wherein the directory is configured to support storage of substantially simultaneous ownership designations for a plurality but less than all of the cache agents,

wherein the directory comprises a table,

wherein a maximum substantially simultaneous ownership of each cache line is equal to a number of table rows such that the number of table rows is less than a number of the cache agents, and

wherein at least one of the rows comprises ownership data for the plurality of cache agents.

14. The method of claim 13 , wherein the directory is further configured to substantially simultaneously store less than all of the cache lines.

15. The method of claim 14 , wherein the directory is a Random Access Memory (RAM) based directory.

16. The method of claim 14 , wherein the directory is a cache based directory.

17. The method of claim 14 , wherein the directory is suitably configured to operate in conjunction with a variable number of cache agents.

18. The method of claim 14 , wherein the directory is suitably configured to operate in conjunction with a variable number of potential cache lines.