Systems and methods for soft decision generation in a solid state memory system

1. A data processing system, the system comprising:

a solid state memory;

a data de-randomizer circuit operable to de-randomize a read data set accessed from the solid state memory device;

a soft data generation circuit operable to:

receive multiple instances of one or more elements of the read data set, wherein each instance of a respective element is read using a different reference value;

access a scramble compensating extended look up table using the multiple instances of the element to receive corresponding soft data; and

a data decoder circuit operable to apply a soft decoding algorithm to the soft data to yield a decoded output.

2. The data processing system of claim 1 , wherein the data decoding algorithm is a low density parity check decoding algorithm.

3. The data processing system of claim 1 , wherein the solid state memory is a single bit per cell flash memory.

4. The data processing system of claim 3 , wherein the scramble compensating extended look up table includes a number of soft data values corresponding to different possible values for the multiple instances of the one or more elements, wherein a first portion of the soft data values correspond to data unmodified by the de-randomizer circuit, and wherein a second portion of the soft data values correspond to data modified by the de-randomizer circuit.

5. The data processing system of claim 1 , wherein the solid state memory is a multi-bit per cell flash memory, wherein the multiple instances of one or more elements of the read data set include a first set of instances corresponding to a first bit in a cell of the multi-bit per cell flash memory, and a second set of instances corresponding to a second bit in the cell of the multi-bit per cell flash memory.

6. The data processing system of claim 5 , wherein the scramble compensating extended look up table includes a first set of soft data values corresponding to different possible values for the first set of instances, and a second set of soft data values corresponding to different possible values for the second set of instances.

7. The data processing system of claim 6 , wherein a first portion of the first set of soft data values corresponds to data unmodified by the de-randomizer circuit, and wherein a second portion of the first set of soft data values corresponds to data modified by the de-randomizer circuit.

8. The data processing system of claim 7 , wherein all of the second portion of the soft data values corresponds to data modified by the de-randomizer circuit.

9. The data processing system of claim 7 , wherein all of the second portion of the soft data values corresponds to data unmodified by the de-randomizer circuit.

10. The data processing system of claim 1 , wherein the data processing system is implemented on an integrated circuit.

11. The data processing system of claim 1 , wherein the solid state memory is a flash memory.

12. A method for recovering data from a solid state memory device, the method comprising:

repeatedly accessing a cell of a solid state memory device using different reference values to yield multiple instances of a read;

applying a de-randomizer algorithm using a de-randomizer circuit to each of the multiple instances of the read to yield corresponding de-randomized instances; and

accessing a scramble compensating extended look up table using the de-randomized instances to receive corresponding soft data.

13. The method of claim 12 , the method further comprising:

applying a low density parity check decoding algorithm to the soft data to yield a decoded output.

14. The method of claim 12 , wherein the solid state memory is selected from a group consisting of: a single bit per cell flash memory, a multi-bit per cell flash memory configured to operate in a single bit per cell mode, and a lower page only mode of a multi-level flash memory.

15. The method of claim 14 , wherein the scramble compensating extended look up table includes a number of soft data values corresponding to different possible values for the multiple instances of the one or more elements, wherein a first portion of the soft data values correspond to data unmodified by the de-randomizer circuit, and wherein a second portion of the soft data values correspond to data modified by the de-randomizer circuit.

16. The method of claim 12 , wherein the solid state memory is a multi-bit per cell flash memory, wherein the multiple instances of one or more elements of the read data set include a first set of instances corresponding to a first bit in a cell of the multi-bit per cell flash memory, and a second set of instances corresponding to a second bit in the cell of the multi-bit per cell flash memory.

17. The method of claim 16 , wherein the scramble compensating extended look up table includes a first set of soft data values corresponding to different possible values for the first set of instances, and a second set of soft data values corresponding to different possible values for the second set of instances.

18. The method of claim 17 , wherein a first portion of the first set of soft data values corresponds to data unmodified by the de-randomizer circuit, and wherein a second portion of the first set of soft data values corresponds to data modified by the de-randomizer circuit.

19. The method of claim 18 , wherein all of the second portion of the soft data values corresponds to data modified by the de-randomizer circuit.

20. The method of claim 18 , wherein all of the second portion of the soft data values corresponds to data unmodified by the de-randomizer circuit.