Metalorganic chemical vapor deposition of oxide dielectrics on N-polar III-nitride semiconductors with high interface quality and tunable fixed interface charge
A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.
1. A method of fabricating a III-nitride semiconductor device, comprising: growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein fixed interface charge at the oxide/III-nitride interface is greater than −2.5×10 12 cm −2 .
2. The method of claim 1 , wherein the growing of the oxide and the III-nitride semiconductor layer is performed in situ in a growth reactor.
3. The method of claim 1 , wherein the oxide and III-nitride semiconductor layer are grown at a temperature above 500° C.
4. The method of claim 1 , wherein the oxide and III-nitride semiconductor layer are grown at a temperature above 900° C.
5. The method of claim 1 , wherein the oxide and III-nitride semiconductor layer are grown at a temperature in a range of 900° C.-1100° C.
6. The method of claim 1 , wherein fixed interface charge at the oxide/III-nitride interface is positive.
7. The method of claim 1 , wherein fixed interface charge at the oxide/III-nitride interface is in a range of −2.5×10 12 cm −2 to +8.9×10 10 cm −2 .
8. A method of fabricating a III-nitride semiconductor device, comprising:
growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein the oxide and the III-nitride semiconductor layer are grown in separate interconnected chambers in a growth reactor.
9. A method of fabricating a III-nitride semiconductor device, comprising:
growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein the III-nitride semiconductor layer is an N-polar III-nitride layer.
10. The method of claim 9 , wherein the oxide is deposited on an N-face of the III-nitride semiconductor layer.
11. A method of fabricating a III-nitride semiconductor device, comprising:
growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein the device is a metal oxide semiconductor high electron mobility transistor (MOSHEMT).
12. The method of claim 11 , wherein the III-nitride semiconductor layer includes an active region of the device and the oxide is between a gate of the device and the active region.
13. A method of fabricating a III-nitride semiconductor device, comprising:
growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein a density of trap states at the oxide/III-nitride interface is less than 10 11 cm 2 .
14. A method of fabricating a III-nitride semiconductor device, comprising:
growing a III-nitride semiconductor layer and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor layer, wherein fixed interface charge at the oxide/III-nitride interface is negative.
15. A device, comprising:
an N-polar III-nitride semiconductor active region;
an oxide layer forming an interface with the active region;
drain and source contacts electrically coupled to the active region; and
a gate deposited on the oxide layer between the source and drain contacts;
wherein a density of trap states at the interface is less than 10 11 cm 2 .
16. The device of claim 15 , wherein:
the active region comprises an N-polar AlGaN barrier layer and an N-polar GaN channel layer; and
the oxide layer forms the interface with the N-polar GaN channel layer.
17. The device of claim 15 , wherein the oxide layer comprises Al 2 O 3 .