High dielectric constant structure for the vertical transfer gates of a complementary metal-oxide semiconductor (CMOS) image sensor
A vertical-gate transfer transistor of an active pixel sensor (APS) is provided. The transistor includes a semiconductor substrate, a vertical trench extending into the semiconductor substrate, a dielectric lining the vertical trench, and a vertical gate filling the lined vertical trench. The dielectric includes a dielectric constant exceeding 3.9 (i.e., the dielectric constant of silicon dioxide). A method of manufacturing the vertical-gate transfer transistor, an APS including the vertical-gate transfer transistor, a method of manufacturing the APS, and an image sensor including a plurality of the APSs are also provided.
1. An active pixel sensor (APS) comprising:
a photodiode arranged in a semiconductor substrate, laterally adjacent to a vertical trench, wherein the photodiode is configured to convert incident radiation to electrical charge and to accumulate the electrical charge;
a vertical-gate transfer transistor configured to selectively transfer the accumulated charge to a charge storage node for read-out, wherein the vertical-gate transfer transistor includes a dielectric layer lining the vertical trench and a vertical gate filling the vertical trench over the dielectric layer, wherein the dielectric layer has a dielectric constant exceeding that of silicon dioxide, and wherein the vertical gate extends from a point over the photodiode to a point below the photodiode;
a shallow trench isolation (STI) region extending into the semiconductor substrate to a first depth, and laterally surrounding the photodiode and the vertical-gate transfer transistor; and
a deep trench isolation (DTI) region extending into the semiconductor substrate to a second depth greater than the first depth, laterally surrounding the STI region, and restricted to a periphery of a multi-pixel sensor array to which the APS belongs;
wherein the dielectric layer covers the STI and DTI regions and comprises an opening exposing the photodiode and source and drain regions on opposing sides of the vertical trench.
2. The APS according to claim 1 , wherein the dielectric layer includes one or more of hafnium oxide (HfO 2 ), aluminum oxide (AlO 3 ), and tantalum pentoxide (Ta 2 O 5 ).
3. The APS according to claim 1 , wherein the dielectric layer has a thickness of about 30-500 angstroms.
4. The APS according to claim 1 , wherein the vertical gate extends vertically into the semiconductor to a depth that is intermediate the first and second depths.
5. The APS according to claim 1 , further comprising:
a reset transistor configured to selectively connect a power source to the charge storage node;
a source follower transistor comprising a gate electrically coupled to the charge storage node; and
a row select transistor configured to selectively couple the source follower transistor to an output;
wherein the source follower transistor is configured to selectively couple the power source to the row select transistor.
6. An active pixel sensor (APS) comprising:
a photodiode arranged in a semiconductor substrate, laterally adjacent to a vertical trench, wherein the photodiode is configured to convert incident radiation to electrical charge and to accumulate the electrical charge;
a vertical-gate transfer transistor configured to selectively transfer the accumulated charge to a charge storage node for read-out, wherein the vertical-gate transfer transistor comprises a dielectric layer lining the vertical trench and a vertical gate filling the vertical trench over the dielectric layer, and wherein the dielectric layer has a dielectric constant exceeding about 3.9;
a first isolation region extending vertically into the semiconductor substrate to a first depth, and laterally surrounding the photodiode and the vertical-gate transfer transistor; and
a second isolation region extending vertically into the semiconductor substrate to a second depth greater than the first depth, and laterally surrounding the first isolation region, the photodiode, and the vertical-gate transfer transistor;
wherein the vertical gate extends vertically into the semiconductor substrate to a depth that is intermediate the first and second depths and the vertical-gate transfer transistor extends from a point over the photodiode to a point below the photodiode;
wherein the dielectric layer covers the first and second isolation regions and comprises an opening exposing the photodiode and source and drain regions on opposing sides of the vertical trench; and
wherein the APS is one of a plurality of pixel sensors in a pixel sensor array, and wherein the second isolation region is restricted to a periphery of the pixel sensor array.
7. The APS according to claim 6 , wherein the dielectric layer includes one or more of hafnium oxide (HfO 2 ), aluminum oxide (AlO 3 ), and tantalum pentoxide (Ta 3 O 5 ).
8. The APS according to claim 6 , further comprising:
a reset transistor configured to selectively connect a power source to the charge storage node;
a source follower transistor comprising a gate electrically coupled to the charge storage node; and
a row select transistor configured to selectively couple the source follower transistor to an output;
wherein the source follower transistor is configured to selectively couple the power source to the row select transistor.
9. The APS according to claim 6 , wherein the first isolation region is a shallow trench isolation (STI) region and the second isolation region is a deep trench isolation (DTI) region.
10. An image sensor comprising a plurality of active pixel sensors (APS), each APS according to the APS of claim 6 .
11. The APS according to claim 6 , wherein the dielectric layer has a thickness of about 30-500 angstroms.
12. The APS according to claim 6 , further comprising:
a source follower transistor having a gate selectively connected to the photodiode by the vertical-gate transfer transistor.