IP Library › Granted Patent US 9,285,613
Granted Patent B2
US 9,285,613 · App. 13/899,986 · Granted Mar 15, 2016

Semiconductor Mach-Zehnder modulator and method for manufacturing semiconductor Mach-Zehnder modulators

Inventor: Hideki Yagi (Machida, JP)
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
G02F1/025G02F1/218G02F1/3136G02F1/3138G02F2001/217
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Quick Facts
Patent No.
US 9,285,613
App. No.
13/899,986
Granted
Mar 15, 2016
Kind
B2
Abstract

A semiconductor Mach-Zehnder modulator includes a substrate having a main surface including first, second and third regions sequentially arranged along a direction; a waveguide mesa including first and second waveguide arms provided on the second region, first and second optical couplers provided on the first and third regions, respectively; a first semiconductor protective layer provided on side surfaces of the first and second waveguide arms; a buried layer provided on side surfaces of the waveguide mesa and on the main surface, the buried layer including a material having a dielectric constant lower than that of the first protective layer; and first and second upper electrodes provided on the first and second waveguide arms, respectively. The first and second optical couplers are connected to the first and second waveguide arms. Above the second region, the buried layer is provided on the first protective layer.

Claims (25)

1. A semiconductor Mach-Zehnder modulator comprising:

a substrate having a main surface, the main surface including a first region, a second region and a third region sequentially arranged along a direction intersecting with a normal vector of the main surface;

a first waveguide arm and a second waveguide arm provided on the second region, a first optical coupler provided on the first region, and a second optical coupler provided on the third region, each of the first waveguide arm and the second waveguide arm having a waveguide mesa extending within each of the first, second and third regions and including a core layer composed of a semiconductor material;

a first protective layer having a thickness between 200 nm and 300 nm provided on sides of the first waveguide arm and on sides of the second waveguide arm in contact with side surfaces of the waveguide mesa of each of the first and second waveguide arms, the first protective layer being formed of a non-doped semiconductor layer or a semi-insulating semiconductor layer;

a second protective layer formed of a dielectric film;

a buried layer provided on the side surfaces of each waveguide mesa in the first, second, and third regions and on the main surface of the substrate so as to bury each waveguide mesa, the buried layer including a material having a dielectric constant lower than that of the first protective layer;

a first upper electrode provided on the first waveguide arm and on the buried layer disposed on the main surface of the substrate; and

a second upper electrode provided on the second waveguide arm and on the buried layer disposed on the main surface of the substrate, wherein

the first optical coupler is connected to the first waveguide arm and the second waveguide arm,

the second optical coupler is connected to the first waveguide arm and the second waveguide arm,

above the second region, the buried layer is provided on the first protective layer at the sides of the first waveguide arm and the second waveguide arm,

above the second region, the sides of the first and second waveguide arms are not covered by the first upper electrode and the second upper electrode,

above the first region and the third region, the buried layer is provided on side surfaces of the first optical coupler and on side surfaces of the second optical coupler, the side surfaces of the first and second optical couplers not having the first protective layer,

above the first region and the third region, the second protective layer is provided between the buried layer and the side surfaces of the first and second optical couplers, and

above the second region, the second protective layer is provided between the buried layer and the first protective layer.

2. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the second protective layer is formed of a silicon dioxide film or a silicon nitride film.

3. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the first optical coupler and the second optical coupler include a multi-mode interference coupler.

4. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the buried layer is formed of a benzocyclobutene resin.

5. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein

the waveguide mesa includes a lower cladding layer, and an upper cladding layer, and

the core layer is provided between the lower cladding layer and the upper cladding layer.

6. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein

the buried layer has openings on the first and second waveguide arms,

the first and second upper electrodes are provided in the openings and on the buried layer, and

the first and second upper electrodes are in contact with the first and second waveguide arms through the openings.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2013
From: YAGI, HIDEKI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 030468/0205 →
Priority Claims (1)
JP 2012-127253 · Jun 4, 2012 · national
Continuity (1)
Related Publication 20130322808A1 · Dec 5, 2013