IP Library › Granted Patent US 9,287,407
Granted Patent B2
US 9,287,407 · App. 13/484,670 · Granted Mar 15, 2016

Manufacturing method of semiconductor device

Inventors: Junichi Koezuka (Tochigi, JP); Shinji Ohno (Atsugi, JP); Yuichi Sato (Isehara, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L29/66969H01L29/78618
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Quick Facts
Patent No.
US 9,287,407
App. No.
13/484,670
Granted
Mar 15, 2016
Kind
B2
Abstract

A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.

Claims (22)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over an oxide semiconductor film with a gate insulating film therebetween;

introducing argon into portions of the oxide semiconductor film by ion implantation or ion doping using at least the gate electrode layer as a mask;

forming a titanium nitride film over the gate electrode layer so as to contact the oxide semiconductor film; and

heating the titanium nitride film to form low-resistance regions in the oxide semiconductor film,

wherein the low-resistance regions contain argon and titanium.

2. The method according to claim 1 , wherein the argon is introduced into the portions of the oxide semiconductor film through the titanium nitride film.

3. The method according to claim 1 , wherein the oxide semiconductor film comprises indium.

4. The method according to claim 1 , wherein the oxide semiconductor film comprises indium, gallium and zinc.

5. The method according to claim 1 , wherein the argon is introduced by ion implantation.

6. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over an oxide semiconductor film with a gate insulating film therebetween;

introducing argon into portions of the oxide semiconductor film by ion implantation or ion doping using at least the gate electrode layer as a mask;

forming side wall insulators on side surfaces of the gate electrode layer;

forming a titanium nitride film over the gate electrode layer and the side wall insulators so as to contact the oxide semiconductor film; and

heating the titanium nitride film to form low-resistance regions in the oxide semiconductor film,

wherein the low-resistance regions contain argon and titanium.

7. The method according to claim 6 , wherein the argon is introduced into the portions of the oxide semiconductor film through the titanium nitride film.

8. The method according to claim 6 , wherein the oxide semiconductor film comprises indium.

9. The method according to claim 6 , wherein the oxide semiconductor film comprises indium, gallium and zinc.

10. The method according to claim 6 , wherein the argon is introduced before forming the side wall insulators.

11. The method according to claim 6 , wherein the argon is introduced after forming the side wall insulators.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2012
From: KOEZUKA, JUNICHI; OHNO, SHINJI; SATO, YUICHI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 028296/0666 →
Priority Claims (1)
JP 2011-129976 · Jun 10, 2011 · national
Continuity (1)
Related Publication 20120315730A1 · Dec 13, 2012