Chip capacitor, circuit assembly, and electronic device

1. A chip capacitor comprising:

a substrate;

a pair of external electrodes formed on the substrate;

a capacitor element connected between the pair of external electrodes; and

a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element.

2. The chip capacitor according to claim 1 , wherein the substrate is a semiconductor substrate and the bidirectional diode includes an impurity diffusion layer formed in the semiconductor substrate.

3. The chip capacitor according to claim 2 , wherein the capacitor element includes a lower electrode constituted of an impurity diffusion layer formed inside the semiconductor substrate.

4. The chip capacitor according to claim 1 , wherein the substrate is a semiconductor substrate,

the capacitor element includes a lower electrode constituted of an impurity diffusion layer formed inside the semiconductor substrate, and

the bidirectional diode includes an impurity diffusion layer continuous to the impurity diffusion layer constituting the lower electrode.

5. The chip capacitor according to claim 1 , wherein the bidirectional diode includes a portion formed in a region directly below the external electrodes.

6. The chip capacitor according to claim 1 , wherein the entirety of the bidirectional diode is formed in a region directly below the external electrodes.

7. The chip capacitor according to claim 1 , wherein the bidirectional diode includes a polysilicon film formed on the substrate.

8. The chip capacitor according to claim 1 , further comprising: a first pad portion connected to the capacitor element; and a second pad portion connected to the bidirectional diode; and

wherein one of the pair of external electrodes is formed to extend across the first pad portion and the second pad portion to electrically connect the first pad portion and the second pad portion.

9. The chip capacitor according to claim 8 , further comprising: an insulating layer disposed between the first pad portion and the second pad portion and separating the first pad portion and the second pad portion; and

wherein the external electrode extends across the insulating layer to be joined to both the first pad portion and the second pad portion.

10. The chip capacitor according to claim 1 , wherein each external electrode is formed to extend across a front surface and a side surface of the substrate and integrally has a front surface portion covering the front surface and a side surface portion covering the side surface.

11. The chip capacitor according to claim 1 , wherein the capacitor element includes

a lower electrode that is formed on the substrate or inside the substrate and connected to one of the pair of external electrodes,

a capacitance film that is laminated on the lower electrode, and

an upper electrode that is laminated on the capacitance film, faces the lower electrode across the capacitance film, and connected to the other of the pair of external electrodes.

12. The chip capacitor according to claim 11 , wherein a trench having a side wall surface intersecting a major surface of the substrate is formed on the substrate and the capacitance film is formed along the side wall surface of the trench.

13. The chip capacitor according to claim 12 , wherein the upper electrode includes a polysilicon film embedded in the trench.

14. The chip capacitor according to claim 1 , wherein the capacitor element includes a plurality of capacitor components and

further includes a plurality of fuses provided on the substrate and disconnectably connecting each of the plurality of the capacitor components to the external electrode.

15. The chip capacitor according to claim 1 , wherein the capacitor element includes a plurality of capacitor components connected in parallel between the pair of external electrodes,

the plurality of capacitor components include

a basic capacitance element and

a plurality of adjusting capacitance elements, and the plurality of adjusting capacitance elements are respectively connected to the external electrodes via a plurality of fuses.

16. The chip capacitor according to claim 15 , wherein the plurality of adjusting capacitance elements have mutually parallel strip shapes, have one ends thereof aligned at a side of one of the pair of external electrodes, and are lined up in order of length, and

the basic capacitance element includes a connection portion, disposed adjacent to an adjusting capacitance element of shortest length among the plurality of adjusting capacitance elements and connected to the one external electrode, and a main portion, formed integral to the connection portion and so as to avoid the plurality of adjusting capacitance elements and widening as the other of the pair of external electrodes is approached.

17. The chip capacitor according to claim 1 , comprising: a resistor element connected between the pair of external electrodes and in parallel to the capacitor element.

18. A circuit assembly comprising:

the chip capacitor according to claim 1 ; and

a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

19. The circuit assembly according to claim 18 ,

wherein each external electrode of the chip capacitor is formed to extend across a front surface and a side surface of the substrate and integrally has a front surface portion covering the front surface and a side surface portion covering the side surface, and

solder is formed to cover the front surface portion and the side surface portion of each external electrode.

20. An electronic device comprising: circuit assembly according to claim 18 ; and a casing that houses the circuit assembly.