Storing a system-absolute address (SAA) in a first level translation look-aside buffer (TLB)

1. A computer system for storing a system-absolute address (SAA) in a first level look-aside buffer (TLB), the system comprising:

a central processor including the first level TLB and general purpose registers (GPRS), the first level TLB configured for storing the SAA, the central processor configured for issuing a load system-absolute address (LSAA) instruction;

a directory;

access exception checking logic; and

a translation unit in communication with the first level TLB of the central processor, the translation unit being distinct from the central processor, the translation unit configured for storing a second level TLB that is distinct from the first level TLB, the system configured to perform a method comprising:

determining, based on the LSAA instruction being issued, whether the SAA is stored in the first level TLB;

sending a translation request to the translation unit from the central processor based on the SAA not being stored in the first level TLB;

determining the SAA by the translation unit based on receiving the translation request by looking up the SAA in a second level TLB that is located on the translation unit;

sending the SAA from the translation unit to the first level TLB and writing the SAA to the first level TLB;

restarting the LSAA instruction by the central processor;

determining that the SAA is stored in an entry in each of the first level TLB and the directory;

obtaining the SAA and a page protection bit corresponding to the SAA from the first level TLB based on the LSAA instruction being issued, and;

sending the page protection bit to the access exception checking logic;

writing the SAA to the GPRS;

while writing the SAA to the GPRS, performing access exception checking for the SAA by the access checking logic based on the page protection bit, the access exception checking comprising:

based on the page protection bit having a first value, only checking for fetch-type access exceptions corresponding to the SAA; and

based on the page protection bit having a second value that is distinct from the first value, checking for both fetch-type access exceptions and store-type access exceptions corresponding to the SAA; and

providing the SAA from the GPRS to an accelerator.

2. The computer system of claim 1 , further comprising loading a cache line indicating the SAA and writing the cache line into the directory based on the SAA being stored in the first level TLB but not in the directory.

3. The computer system of claim 1 , wherein the directory further stores a storage key, wherein the access exception checking further comprises sending the storage key from the directory to the access exception checking logic and checking for access exceptions corresponding to the SAA based on the storage key.

4. A computer program product for storing a system-absolute address (SAA) in a first level look-aside buffer (TLB), the computer program product comprising:

a tangible, non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:

determining, based on a load system-absolute address (LSAA) instruction being issued by a central processor, whether the SAA is stored in the first level TLB, the first level TLB located on the central processor, the translation unit being remote from and distinct from the central processor, the translation unit configured for storing a second level TLB that is distinct from the first level TLB;

sending a translation request to a translation unit from the central processor based on the SAA not being stored in the first level TLB;

determining the SAA by the translation unit based on receiving the translation request by looking up the SAA in the second level TLB that is located on the translation unit;

sending the SAA from the translation unit to the first level TLB and writing the SAA to the TLB;

restarting the LSAA instruction by the central processor;

determining that the SAA is stored in an entry in each of the first level TLB and a directory;

obtaining the SAA and a page protection bit corresponding to the SAA from the first level TLB based on the LSAA instruction being issued, and;

sending the page protection bit to access exception checking logic;

writing the SAA to the GPRS;

while writing the SAA to the GPRS, performing access exception checking for the SAA by the access exception checking logic based on the page protection bit, the access exception checking comprising:

based on the page protection bit having a first value, only checking for fetch-type access exceptions corresponding to the SAA; and

based on the page protection bit having a second value that is distinct from the first value, checking for both fetch-type access exceptions and store-type access exceptions corresponding to the SAA; and

providing the SAA from the GPRS to an accelerator.

5. The computer program product of claim 4 , further comprising loading a cache line indicating the SAA and writing the cache line into the directory based on the SAA being stored in the first level TLB but not in the directory.

6. The computer program product of claim 4 , wherein the directory further stores a storage key, wherein the access exception checking further comprises sending the storage key from the directory to the access exception checking logic and checking for access exceptions corresponding to the SAA based on the storage key.

7. A computer implemented method for storing a system-absolute address (SAA) in a first level look-aside buffer (TLB), the method comprising:

determining, based on a load system-absolute address (LSAA) instruction being issued by a central processor, whether the SAA is stored in the first level TLB, the first level TLB located on the central processor, the translation unit being remote from and distinct from the central processor, the translation unit configured for storing a second level TLB that is distinct from the first level TLB;

sending a translation request to a translation unit from the central processor based on the SAA not being stored in the first level TLB;

determining the SAA by the translation unit based on receiving the translation request by looking up the SAA in a the second level TLB that is located on the translation unit;

sending the SAA from the translation unit to the first level TLB and writing the SAA to the TLB;

restarting the LSAA instruction by the central processor;

determining that the SAA is stored in an entry in each of the first level TLB and a directory;

obtaining the SAA and a page protection bit corresponding to the SAA from the first level TLB based on the LSAA instruction being issued, and;

sending the page protection bit to access exception checking logic;

writing the SAA to the GPRS;

while writing the SAA to the GPRS, performing access exception checking for the SAA by the access exception checking logic based on the page protection bit, the access exception checking comprising:

based on the page protection bit having a first value, only checking for fetch-type access exceptions corresponding to the SAA; and

based on the page protection bit having a second value that is distinct from the first value, checking for both fetch-type access exceptions and store-type access exceptions corresponding to the SAA; and

providing the SAA from the GPRS to an accelerator.

8. The system of claim 1 , wherein the accelerator comprises a cryptographic accelerator.

9. The system of claim 1 , wherein the accelerator comprises a data movement accelerator.

10. The system of claim 1 , wherein determining the SAA by the translation unit based on receiving the translation request by looking up the SAA in a second level TLB that is located on the translation unit comprises determining a page protection bit corresponding to the SAA; and

wherein sending the SAA from the translation unit to the first level TLB and writing the SAA to the first level TLB comprises sending the page protection bit corresponding to the SAA from the translation unit to the first level TLB, and writing the page protection bit corresponding to the SAA into an entry corresponding to the SAA in the first level TLB.