IP Library Granted Patent US 9,300,025
Granted Patent B2
US 9,300,025 · App. 13/854,958 · Granted Mar 29, 2016

Interface between an integrated circuit and a dielectric waveguide using a carrier substrate with a dipole antenna and a reflector

Inventors: Juan Alejandro Herbsommer (Allen, TX); Gerd Schuppener (Allen, TX); Robert Floyd Payne (Lucas, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H01P5/107G02B6/4416H01P3/121H01P3/16H01P3/165H01P5/00H01P5/087H01P11/001H01P11/002H01Q1/50H01Q19/108H01Q19/30H04B1/40Y10T29/49016Y10T29/49826
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Quick Facts
Patent No.
US 9,300,025
App. No.
13/854,958
Granted
Mar 29, 2016
Kind
B2
Abstract

A system includes an integrated circuit that has a substrate with a top surface and a bottom surface. Semiconductor circuitry is including a radio frequency (RF) amplifier configured to produce an RF signal or an RF receiver configured to receive an RF signal is formed on the top surface of the substrate. A through-substrate via is coupled to an output of the RF amplifier. A metalized antenna formed on the bottom surface of the substrate is coupled to the through-substrate via. The metalized antenna is configured to launch an electromagnet wave representative of the RF signal into a dielectric waveguide (DWG) when the DWG is coupled to the bottom side of the substrate.

Claims (27)

1. A planar carrier substrate comprising:

a top surface and a bottom surface;

an integrated circuit mount on the top surface;

connection pins on the bottom surface;

vias extending through the substrate between the bottom surface and the top surface for coupling the integrated circuit mount to the connection pins;

an interface surface on the bottom surface;

a reflector structure formed in the carrier substrate opposite the interface surface; and

a dipole antenna coupled to the integrated circuit mount and arranged adjacent the interface surface between the reflector structure and interface surface.

2. The substrate of claim 1 including an integrated circuit mounted on the integrated circuit mount and the integrated circuit having a sub-terahertz signal output coupled to the dipole antenna.

3. The substrate of claim 1 in which the reflector structure is arranged at the top surface.

4. The substrate of claim 1 in which the dipole antenna is arranged at the bottom surface.

5. The substrate of claim 1 in which the reflector structure is spaced from the dipole antenna a distance of approximately one half of a wave length.

6. The substrate of claim 1 in which the reflector structure is spaced from the dipole antenna a distance of approximately an integer and one half of a wave length.

7. The substrate of claim 1 in which the reflector structure is spaced from the dipole antenna a distance in a range of 0.3 to 0.7 or multiples thereof of a wave length.

8. The substrate of claim 1 in which the reflector structure is a metallic plate.

9. A system comprising:

a first planar substrate having a top surface, a bottom surface, an opening between the top and bottom surface, and via pads on the top surface;

a carrier substrate mounted on the top surface of the first substrate, the carrier substrate having a reflector structure formed in the carrier substrate, a top surface and a bottom surface, the top surface having a mount for an integrated circuit, the bottom surface having connection pins coupled to the via pads, and a dipole antenna arranged over the opening between the reflector structure and the opening; and

a solid core dielectric waveguide having a first portion passing through the opening with an interface surface adjacent the dipole antenna, a second portion extending substantially parallel with the first substrate, and an elbow portion between the first portion and the second portion.

10. The system of claim 9 in which the reflector structure is spaced from the dipole antenna a distance of approximately an integer and one half of a wave length.

11. The system of claim 9 in which the reflector structure is spaced from the dipole antenna a distance in a range of 0.3 to 0.7 or multiples thereof of a wave length.

12. The system of claim 9 including an integrated circuit mounted on the carrier substrate on the integrated circuit mount and the integrated circuit having a sub-terahertz signal output coupled to the dipole antenna.

13. The system of claim 9 in which the first planar substrate is a printed circuit board.

14. The system of claim 9 in which the reflector structure is metal.

15. The system of claim 9 in which the reflector structure is planar and extends over the dipole antenna.

16. The system of claim 9 including solder balls coupling the connection pins to the via pads.

17. The system of claim 9 in which the reflector structure is spaced from the dipole antenna a distance of approximately one half of a wave length.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2013
From: HERBSOMMER, JUAN ALEJANDRO; SCHUPPENER, GERD; PAYNE, ROBERT FLOYD
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 030136/0614 →
Continuity (2)
Provisional Application 61803435 · Mar 19, 2013
Related Publication 20140287703A1 · Sep 25, 2014