IP Library › Granted Patent US 9,318,382
Granted Patent B2
US 9,318,382 · App. 14/656,372 · Granted Apr 19, 2016

Semiconductor device with air gap and method of fabricating the same

Inventor: Myung-Ok Kim (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
H01L21/76879H01L21/764H01L21/7682H01L21/76855H01L23/5222H01L23/535H01L27/10855H01L27/10885H01L27/10888H01L2924/0002
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Quick Facts
Patent No.
US 9,318,382
App. No.
14/656,372
Granted
Apr 19, 2016
Kind
B2
Abstract

A method of fabricating a semiconductor device and a semiconductor device formed by the method. The method includes form a stack conductive structure by stacking a first conductive pattern and an insulation pattern over a substrate; forming a sacrificial pattern over sidewalls of the stack conductive structure; forming a second conductive pattern having a recessed surface lower than a top surface of the stack conductive structure; forming a sacrificial spacer to expose sidewalls of the insulation pattern by removing an upper portion of the sacrificial pattern; reducing a width of the exposed portion of the insulation patters; forming a capping spacer to cap the sidewalls of the insulation pattern having the reduced width over the sacrificial spacer; and forming an air gap between the first conductive pattern and the second conductive pattern by converting the sacrificial spacer to volatile byproducts.

Claims (19)

1. A method for fabricating a semiconductor device, the method comprising:

forming, over a substrate, a plurality of bit line structures, each including a stacked bit line and a hard mask pattern;

forming an inter-layer insulation layer over the plurality of bit line structures;

forming, by etching the inter-layer insulation layer, a contact hole between the plurality of bit line structures;

forming a carbon-containing spacer on sidewalls, of the plurality of bit line structures, that define the contact hole;

forming a first plug in the contact hole to form a recess plug structure, including the carbon-containing spacer, wherein the carbon-containing spacer is located between the first plug and the sidewalls of the contact hole;

removing the carbon-containing spacer to expose sidewalls of the hard mask pattern;

reducing a thickness of the exposed sidewalls of the hard mask pattern;

forming a capping spacer to cap the carbon-containing spacer and the reduced thickness sidewalls of the hard mask pattern; and

forming an air gap between the bit line and the first plug by converting the carbon-containing spacer to a volatile form.

2. The method of claim 1 , further comprising:

forming a bit line spacer over the plurality of bit line structures; and

wherein the forming the carbon-containing spacer on the sidewalls of the bit line structures that define the contact hole further comprises:

forming the carbon-containing spacer over the bit line spacer.

3. The method of claim 2 , wherein the bit line spacer includes an insulation material having a density that is sufficiently high as to prevent the converted carbon-containing spacer from diffusing through the bit line spacer.

4. The method of claim 1 , wherein the carbon-containing spacer includes amorphous carbon.

5. The method of claim 1 , wherein the converting the carbon-containing spacer to a volatile form comprises:

volatilizing the carbon-containing spacer via an oxygen plasma treatment.

6. The method of claim 1 , wherein the capping spacer includes an insulation material having a density that is sufficiently low as to allow the converted carbon-containing spacer to diffuse through the capping spacer.

Priority Claims (1)
KR 10-2013-0041584 · Apr 16, 2013 · national
Continuity (2)
Division 14015423 · Aug 30, 2013
Related Publication 20150187644A1 · Jul 2, 2015