Driver circuit, signal processing unit having the driver circuit, method for manufacturing the signal processing unit, and display device
View Patent ↗Disclosed is a driver circuit including a latch circuit, a shift register circuit, and a switching circuit, where the latch circuit is provided over the shift register circuit and the switching circuit. The shift register circuit and the switching circuit may have a silicon-based semiconductor, while the latch circuit may have an oxide semiconductor. The latch circuit includes a first transistor and a second transistor connected in series. The latch circuit may further include a first capacitor and a second capacitor which are electrically connected to the first transistor and the second transistor. A display device using the driver circuit as well as a method for preparing the driver circuit is also disclosed.
1. A semiconductor device comprising:
a first layer comprising a transistor including an oxide semiconductor film;
a second layer over the first layer, the second layer comprising a transistor including a silicon semiconductor film;
a shift register circuit and a switching circuit comprising the transistor including the silicon semiconductor film; and
a latch circuit comprising the transistor including the oxide semiconductor film.
2. The semiconductor device according to claim 1 ,
wherein the silicon semiconductor film is a single crystal silicon semiconductor film.
3. The semiconductor device according to claim 1 ,
wherein the transistor including the oxide semiconductor film overlaps with the transistor including the silicon semiconductor film.
4. The semiconductor device according to claim 1 ,
wherein the latch circuit further comprises a capacitor,
wherein one of electrodes of the capacitor is electrically connected to one of a source and a drain of the transistor including the oxide semiconductor film.
5. A display device comprising:
a substrate;
a pixel portion over the substrate, the pixel portion including a thin film transistor and a pixel electrode;
a display element layer over the pixel portion;
a counter substrate over the display element layer; and
a signal processing unit electrically connected to the pixel portion,
wherein the signal processing unit comprises:
a first layer comprising a transistor including an oxide semiconductor film;
a second layer over the first layer, the second layer comprising a transistor including a silicon semiconductor film;
a shift register circuit and a switching circuit comprising the transistor including the silicon semiconductor film; and
a latch circuit comprising the transistor including the oxide semiconductor film.
6. The display device according to claim 5 ,
wherein the silicon semiconductor film is a single crystal silicon semiconductor film.
7. The display device according to claim 5 ,
wherein the transistor including the oxide semiconductor film overlaps with the transistor including the silicon semiconductor film.
8. The display device according to claim 5 ,
wherein the latch circuit further comprises a capacitor,
wherein one of electrodes of the capacitor is electrically connected to one of a source and a drain of the transistor including the oxide semiconductor film.
9. A semiconductor device comprising:
a first layer comprising a circuit including a transistor having a silicon semiconductor film; and
a second layer over the first layer, the second layer comprising a latch circuit including a first transistor having an oxide semiconductor film.
10. The semiconductor device according to claim 9 ,
wherein the latch circuit further comprises a second transistor,
wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor.
11. The semiconductor device according to claim 9 ,
wherein the latch circuit further comprises a first capacitor,
wherein one of a source and a drain of the first transistor is electrically connected to one of electrodes of the first capacitor.
12. The semiconductor device according to claim 10 ,
wherein the latch circuit further comprises a first capacitor,
wherein the one of the source and the drain of the first transistor is electrically connected to one of electrodes of the first capacitor.
13. The semiconductor device according to claim 12 ,
wherein the latch circuit further comprises a second capacitor,
wherein the other of the source and the drain of the second transistor is electrically connected to one of electrodes of the second capacitor.
14. A display device comprising the semiconductor device according to claim 9 .