Electrostatic and piezoelectric touch panel
An electrostatic and piezoelectric touch panel includes a first switching circuit, a second switching circuit, at least one first sensing device, and at least one second sensing device. The first sensing device includes a first transistor and a piezoelectric-transistor. The first transistor and the piezoelectric-transistor are series-connected between a power source and ground. The first switching circuit connects to a connection point between the first transistor and the piezoelectric-transistor. The second sensing device includes a second transistor and two parallel-connected electrostatic to transistors. The second transistor and the two parallel-connected electrostatic transistors are series-connected between a negative power source and ground. The first switching circuit connects to a connection point between the second transistor and the two parallel-connected electrostatic transistors. Gates of the first and second transistors connect to the second switching circuit. The two parallel-connected electrostatic transistors include different types of doped semiconductor materials.
1. An electrostatic and piezoelectric touch panel comprising:
a first switching circuit;
a second switching circuit;
at least one first sensing device comprising a first transistor and a piezoelectric-transistor connected with the first transistor in series between a power source and ground, wherein the first switching circuit connects to a connection linking the first transistor and the piezoelectric-transistor; and
at least one second sensing device comprising a second transistor and to two parallel-connected electrostatic transistors connected with the second transistor in series between the power source and the ground,
wherein the first switching circuit connects to a connection linking the second transistor and the two parallel-connected electrostatic transistors;
wherein each gate of the first and second transistors connects to the second switching circuit; wherein the two parallel-connected electrostatic transistors comprise different types of doped semiconductor materials.
2. The electrostatic and piezoelectric touch panel of claim 1 , wherein the first transistor is an n-type metal oxide semiconductor field effect transistor.
3. The electrostatic and piezoelectric touch panel of claim 2 , wherein the power source is a positive power source.
4. The electrostatic and piezoelectric touch panel of claim 1 , wherein the first transistor is a p-type metal oxide semiconductor field effect transistor.
5. The electrostatic and piezoelectric touch panel of claim 4 , wherein the power source is a negative power source.
6. The electrostatic and piezoelectric touch panel of claim 1 , wherein the piezoelectric-transistor is an n-type piezoelectric metal oxide semiconductor field effect transistor.
7. The electrostatic and piezoelectric touch panel of claim 1 , wherein the piezoelectric-transistor is a p-type piezoelectric metal oxide semiconductor field effect transistor.
8. The electrostatic and piezoelectric touch panel of claim 1 , wherein the second transistor is an n-type metal oxide semiconductor field effect transistor.
9. The electrostatic and piezoelectric touch panel of claim 1 , wherein the second transistor is a p-type metal oxide semiconductor field effect transistor.
10. The electrostatic and piezoelectric touch panel of claim 1 , wherein the two parallel-connected electrostatic transistors comprise an n-type metal oxide semiconductor field effect transistor and a p-type metal oxide semiconductor field effect transistor.
11. The electrostatic and piezoelectric touch panel of claim 1 , wherein the first and second sensing devices are respectively formed above a light-blocking layer.
12. The electrostatic and piezoelectric touch panel of claim 1 , wherein a gate of the two parallel-connected electrostatic transistors is floated.
13. The electrostatic and piezoelectric touch panel of claim 1 , wherein a gate of the piezoelectric-transistor is grounded.
14. The electrostatic and piezoelectric touch panel of claim 1 , wherein a portion of a drain terminal and a portion of a source terminal of the piezoelectric-transistor extend over or under a channel of the piezoelectric-transistor.