Semiconductor device
Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor ( 105 ), a charge equivalent to a threshold value of a TFT ( 104 ) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor ( 105 ) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT ( 101 ). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT ( 101 ).
1. A semiconductor device comprising:
first, second, third and fourth transistors, a capacitor and a light shielding layer;
wherein the first, second, third and fourth transistors are the same conductivity type,
wherein a first electrode of the capacitor is electrically connected to a gate of the first transistor,
wherein the first electrode of the capacitor is electrically connected to a gate of the fourth transistor,
wherein the first electrode of the capacitor is electrically connected to one of source and drain of the third transistor,
wherein a second electrode of the capacitor is electrically connected to one of source and drain of the fourth transistor,
wherein a gate of the second transistor is electrically connected to a first signal input terminal,
wherein one of source and drain of the first transistor is electrically connected to a signal output terminal,
wherein the one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,
wherein the one of source and drain of the first transistor is electrically connected to the other of source and drain of the third transistor,
wherein the other of source and drain of the second transistor is electrically connected to a first power supply line,
wherein the light shielding layer includes a first region, and
wherein the first region and a channel formation region of at least one of the first, the second the third and the fourth transistors overlap each other.
2. The semiconductor device according to claim 1 , wherein the second electrode of the capacitor is electrically connected to a second signal input terminal.
3. The semiconductor device according to claim 1 , wherein a gate of the third transistor is electrically connected to the other of source and drain of the third transistor.
4. The semiconductor device according to claim 1 , wherein the one of source and drain of the fourth transistor is electrically connected to a second signal input terminal.
5. The semiconductor device according to claim 1 , wherein the other of source and drain of the first transistor is electrically connected to a second power supply line.
6. The semiconductor device according to claim 1 , wherein the other of source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor.
7. The semiconductor device according to claim 1 , wherein said conductivity type is an n-channel type.
8. A display device comprising the semiconductor device according to claim 1 , wherein the display device comprises a display element.
9. A display module comprising the display device according to claim 8 , wherein the display module comprises a flexible printed circuit.
10. Electric equipment comprising the display module according to claim 9 , wherein the electric equipment includes at least one of a battery, an image receiving portion, an audio input portion, an audio output portion and antenna.
11. A semiconductor device comprising:
first, second, third and fourth transistors, a capacitor, a light shielding layer and an orientation layer;
wherein the first, second, third and fourth transistors are the same conductivity type,
wherein a first electrode of the capacitor is electrically connected to a gate of the first transistor,
wherein the first electrode of the capacitor is electrically connected to a gate of the fourth transistor,
wherein the first electrode of the capacitor is electrically connected to one of source and drain of the third transistor,
wherein a second electrode of the capacitor is electrically connected to one of source and drain of the fourth transistor,
wherein a gate of the second transistor is electrically connected to a first signal input terminal,
wherein one of source and drain of the first transistor is electrically connected to a signal output terminal,
wherein the one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,
wherein the one of source and drain of the first transistor is electrically connected to the other of source and drain of the third transistor,
wherein the other of source and drain of the second transistor is electrically connected to a first power supply line,
wherein the light shielding layer includes a first region,
wherein the orientation layer includes a second region, and
wherein the first region, the second region and a channel formation region of at least one of the first, the second the third and the fourth transistors overlap each other.
12. The semiconductor device according to claim 11 , wherein the second electrode of the capacitor is electrically connected to a second signal input terminal.
13. The semiconductor device according to claim 11 , wherein a gate of the third transistor is electrically connected to the other of source and drain of the third transistor.
14. The semiconductor device according to claim 11 , wherein the one of source and drain of the fourth transistor is electrically connected to a second signal input terminal.
15. The semiconductor device according to claim 11 , wherein the other of source and drain of the first transistor is electrically connected to a second power supply line.
16. The semiconductor device according to claim 11 , wherein the other of source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor.
17. The semiconductor device according to claim 11 , wherein said conductivity type is an n-channel type.
18. A display device comprising the semiconductor device according to claim 11 , wherein the display device comprises a display element.
19. A display module comprising the display device according to claim 18 , wherein the display module comprises a flexible printed circuit.
20. Electric equipment comprising the display module according to claim 19 , wherein the electric equipment includes at least one of a battery, an image receiving portion, an audio input portion, an audio output portion and antenna.
21. A semiconductor device comprising:
first, second, third and fourth transistors, a capacitor, a light shielding layer and an orientation layer;
wherein the first, second, third and fourth transistors are the same conductivity type,
wherein a first electrode of the capacitor is directly connected to a gate of the first transistor,
wherein the first electrode of the capacitor is electrically connected to a gate of the fourth transistor,
wherein the first electrode of the capacitor is directly connected to one of source and drain of the third transistor,
wherein a second electrode of the capacitor is directly connected to one of source and drain of the fourth transistor,
wherein a gate of the second transistor is directly connected to a first signal input terminal,
wherein one of source and drain of the first transistor is directly connected to a signal output terminal,
wherein the one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,
wherein the one of source and drain of the first transistor is electrically connected to the other of source and drain of the third transistor,
wherein the other of source and drain of the second transistor is electrically connected to a first power supply line,
wherein the one of source and drain of the second transistor is directly connected to the signal output terminal,
wherein the other of source and drain of the third transistor is directly connected to the signal output terminal,
wherein the light shielding layer includes a first region,
wherein the orientation layer includes a second region, and
wherein the first region, the second region and a channel formation region of at least one of the first, the second the third and the fourth transistors overlap each other.
22. The semiconductor device according to claim 21 , wherein the second electrode of the capacitor is electrically connected to a second signal input terminal.
23. The semiconductor device according to claim 21 , wherein a gate of the third transistor is electrically connected to the other of source and drain of the third transistor.
24. The semiconductor device according to claim 21 , wherein the one of source and drain of the fourth transistor is electrically connected to a second signal input terminal.
25. The semiconductor device according to claim 21 , wherein the other of source and drain of the first transistor is electrically connected to a second power supply line.
26. The semiconductor device according to claim 21 , wherein the other of source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor.
27. The semiconductor device according to claim 21 , wherein said conductivity type is an n-channel type.
28. A display device comprising the semiconductor device according to claim 21 , wherein the display device comprises a display element.
29. A display module comprising the display device according to claim 28 , wherein the display module comprises a flexible printed circuit.
30. Electric equipment comprising the display module according to claim 29 , wherein the electric equipment includes at least one of a battery, an image receiving portion, an audio input portion, an audio output portion and antenna.