IP Library Granted Patent US 9,349,454
Granted Patent B2
US 9,349,454 · App. 14/636,792 · Granted May 24, 2016

Semiconductor device and electronic device

Inventors: Takayuki Ikeda (Kanagawa, JP); Yoshiyuki Kurokawa (Kanagawa, JP); Munehiro Kozuma (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G11C16/0441G11C16/10
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Quick Facts
Patent No.
US 9,349,454
App. No.
14/636,792
Granted
May 24, 2016
Kind
B2
Abstract

A semiconductor device capable of generating a signal (e.g., a potential signal or a current signal) suitable for usage environment or a purpose. The semiconductor device includes a first memory circuit, a first circuit, and a second memory circuit. The first circuit converts a digital signal input from the first memory circuit into an analog signal. The first memory circuit includes an input node, an output node, a transistor, and a capacitor. The capacitor is electrically connected to the output node. The transistor can control a conduction state between the input node and the output node. An analog signal is input to the input node from the first circuit. The transistor includes an oxide semiconductor layer where a channel formation region is formed.

Claims (76)

1. A semiconductor device comprising:

a first memory circuit;

a circuit; and

a second memory circuit,

wherein the circuit converts a digital signal input from the second memory circuit into an analog signal,

wherein the first memory circuit includes an input node, an output node, a first transistor, and a first capacitor,

wherein the first capacitor is electrically connected to the output node,

wherein the first transistor controls a conduction state between the input node and the output node,

wherein the analog signal is input to the input node, and

wherein a channel in the first transistor includes an oxide semiconductor.

2. The semiconductor device according to claim 1 ,

wherein the second memory circuit includes a memory cell and a wiring,

wherein the memory cell includes a second transistor, a third transistor, a second capacitor, and a node,

wherein the second transistor controls a conduction state between the wiring and the node,

wherein a gate of the third transistor and the second capacitor are electrically connected to the node, and

wherein a channel in the second transistor includes an oxide semiconductor.

3. The semiconductor device according to claim 1 ,

wherein the second memory circuit includes a memory cell and a wiring,

wherein the memory cell includes a second transistor, a third transistor, a fourth transistor, and a node,

wherein the second transistor controls a conduction state between the wiring and the node,

wherein the third transistor and the fourth transistor are electrically connected to each other in series,

wherein a gate of the third transistor is electrically connected to the node, and

wherein a channel in the second transistor includes an oxide semiconductor.

4. A semiconductor device comprising:

the semiconductor device according to claim 1 ; and

an operational amplifier electrically connected to the output node.

5. A semiconductor device comprising:

the semiconductor device according to claim 1 ;

an operational amplifier electrically connected to the output node; and

a sensor circuit electrically connected to an input node of the operational amplifier.

6. A semiconductor device comprising:

the semiconductor device according to claim 1 ;

an operational amplifier electrically connected to the output node;

a sensor circuit electrically connected to the operational amplifier; and

an antenna.

7. An electronic device comprising:

the semiconductor device according to claim 1 ; and

at least one of a display portion, a housing, a microphone, a speaker, and an operation key.

8. A semiconductor device comprising:

a circuit;

a digital-to-analog converter circuit; and

a memory device,

wherein the digital-to-analog converter circuit converts a digital signal input from the memory device into an analog signal,

wherein the circuit includes an input node, an output node, a first transistor, and a first capacitor,

wherein the first capacitor is electrically connected to the output node,

wherein the first transistor controls a conduction state between the input node and the output node,

wherein the analog signal is input to the input node, and

wherein a channel in the first transistor includes an oxide semiconductor.

9. The semiconductor device according to claim 8 ,

wherein the memory device includes a memory cell and a wiring,

wherein the memory cell includes a second transistor, a third transistor, a second capacitor, and a node,

wherein the second transistor controls a conduction state between the wiring and the node,

wherein a gate of the third transistor and the second capacitor are electrically connected to the node, and

wherein a channel in the second transistor includes an oxide semiconductor.

10. The semiconductor device according to claim 8 ,

wherein the memory device includes a memory cell and a wiring,

wherein the memory cell includes a second transistor, a third transistor, a fourth transistor, and a node,

wherein the second transistor controls a conduction state between the wiring and the node,

wherein the third transistor and the fourth transistor are electrically connected to each other in series,

wherein a gate of the third transistor is electrically connected to the node, and

wherein a channel in the second transistor includes an oxide semiconductor.

11. A semiconductor device comprising:

the semiconductor device according to claim 8 ; and

an operational amplifier electrically connected to the output node.

12. A semiconductor device comprising:

the semiconductor device according to claim 8 ;

an operational amplifier electrically connected to the output node; and

a sensor circuit electrically connected to an input node of the operational amplifier.

13. A semiconductor device comprising:

the semiconductor device according to claim 8 ;

an operational amplifier electrically connected to the output node;

a sensor circuit electrically connected to the operational amplifier; and

an antenna.

14. An electronic device comprising:

the semiconductor device according to claim 8 ; and

at least one of a display portion, a housing, a microphone, a speaker, and an operation key.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2015
From: IKEDA, TAKAYUKI; KUROKAWA, YOSHIYUKI; KOZUMA, MUNEHIRO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 035192/0104 →
Priority Claims (1)
JP 2014-045282 · Mar 7, 2014 · national
Continuity (1)
Related Publication 20150255157A1 · Sep 10, 2015