IP Library Granted Patent US 9,374,541
Granted Patent B2
US 9,374,541 · App. 14/716,453 · Granted Jun 21, 2016

Imaging device and camera system including sense circuits to make binary decision

Inventor: Toshiyuki Nishihara (Kanagawa, JP)
Assignee: SONY CORPORATION
H04N5/3537G01J1/44H01L27/1469H01L27/14634H01L27/14645H04N5/3355H04N5/357H04N5/359H04N5/3535H04N5/361H04N5/365H04N5/374H04N5/378H04N5/37452
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Quick Facts
Patent No.
US 9,374,541
App. No.
14/716,453
Granted
Jun 21, 2016
Kind
B2
Abstract

An imaging device includes: a pixel array section having an array of pixels, each of which has a photoelectric converting device and outputs an electric signal according to an input photon; a sense circuit section having a plurality of sensor circuits each of which makes binary decision on whether there is a photon input to a pixel in a predetermined period upon reception of the electric signal therefrom; and a decision result IC section which integrates decision results from the sense circuits, pixel by pixel or for each group of pixels, multiple times to generate imaged data with a gradation, the decision result IC section including a count circuit which performs a count process to integrate the decision results from the sense circuits, and a memory for storing a counting result for each pixel from the count circuit, the sense circuits sharing the count circuit for integrating the decision results.

Claims (39)

1. An imaging device comprising:

an array of pixels each of which has a photoelectric converting device and outputs an electric signal according to an input photon;

reset circuitry configured to reset each of the pixels to a reset state where a photon is not input;

a plurality of sense circuits each of which makes a binary decision on whether there is a photon input to a pixel in a predetermined period upon reception of the electric signal therefrom, the binary decision for a respective pixel being made by reading a signal in the reset state, reading a signal after exposure to an input photon, adding an offset to one of the signal in the reset state or the signal after exposure, and comparing the signal in the reset state and the signal after exposure, one of which is added with the offset; and

decision result circuitry configured to integrate decision results from the sense circuits, pixel by pixel or for each group of pixels,

wherein the decision result circuitry includes a count circuit configured to perform a count process to integrate the decision results from the sense circuits, and a memory for storing a counting result for each pixel from the count circuit.

2. The imaging device according to claim 1 , wherein the plurality of pixels and the plurality of sense circuits are formed in one-to-one correspondence, and connected together respectively, and every predetermined number of sense circuits in the plurality of sense circuits share the count circuit.

3. The imaging device according to claim 2 , wherein the plurality of pixels are laid out in a matrix form in a row direction and in a column direction, the plurality of sense circuits are laid out in a matrix form in a row direction and in a column direction, and connected in one-to-one correspondence to the plurality of pixels, and those sense circuits in the plurality of sense circuits which are located in a same row or a same column share the count circuit.

4. The imaging device according to claim 1 , wherein a plurality of pixels share the count circuit.

5. The imaging device according to claim 4 , further comprising

a plurality of pixel blocks each including a plurality of pixels and selection circuitry configured to select from the included plurality of pixels, wherein

independent sense circuits of the plurality of sense circuits are arranged in association with the pixel blocks.

6. The imaging device according to claim 5 , wherein the selection circuitry is configured to cyclically select each pixel in the pixel block, and output a signal of the selected pixel to a respective sense circuit, and the respective sense circuit makes a decision on whether a photon is input to each pixel in a given period from previous selection to current selection.

7. The imaging device according to claim 6 , wherein the reset circuitry is configured to adjust an exposure period by inserting a reset process to set the exposure period constant for the individual pixels between selective outputting of each pixel and next selective outputting in the pixel block.

8. The imaging device according to claim 1 , wherein the decision result circuitry is configured to add count values for a plurality of pixels via the count circuit shared by the pixels.

9. The imaging device according to claim 1 , wherein

the plurality of sense circuits are configured to repeatedly execute binary decisions in a unit frame period multiple times, a cycle period of the decisions being variably set within a range of a plurality of cycle periods according to N times a unit cycle period (N being an integer), and

the decision result circuitry is configured to integrate the decision results to derive an amount of photons input to a light receiving section of the array of pixels.

10. The imaging device according to claim 9 , wherein the decision result circuitry is configured to one of

carry out derivation of the amount of photons input in a same unit frame period in a small number of decisions over a long cycle period, or

carry out the derivation of the amount of photons input in a large number of decisions over a short cycle period.

11. The imaging device according to claim 10 , wherein a plurality of decisions including a decision in a short cycle period and a decision in a long cycle period are further cyclically made in the unit frame period, results of the decisions are combined and integrated to derive an amount of photons input to the light receiving section.

12. The imaging device according to claim 9 , wherein a small number of decisions are made over a long cycle period in imaging at low illuminance, and a large number of decisions are made over a short cycle period in imaging at high illuminance.

13. The imaging device according to claim 1 , wherein the offset is added to the signal after exposure.

14. The imaging device according to claim 1 , wherein the offset is added to the signal in the reset state.

15. An imaging device comprising:

a pixel array section having an array of pixels each of which has a photoelectric converting device and outputs an electric signal according to an input photon;

a reset circuit section configured to reset each of the pixels to a reset state where a photon is not input;

a sense circuit section having a plurality of sense circuits each of which makes a binary decision on whether there is a photon input to a pixel in a predetermined period upon reception of the electric signal therefrom, the binary decision for a respective pixel being made by reading a signal in the reset state, reading a signal after exposure to an input photon, adding an offset to one of the signal in the reset state or the signal after exposure, and comparing the signal in the reset state and the signal after exposure, one of which is added with the offset; and

a decision result IC section which integrates decision results from the sense circuits, pixel by pixel or for each group of pixels,

wherein the decision result IC section includes a count circuit configured to perform a count process to integrate the decision results from the sense circuits, and a memory for storing a counting result for each pixel from the count circuit.

16. An imaging method, performed by circuitry, comprising:

resetting, by reset circuitry, a pixel, of an array of pixels of an imaging device, to a reset state where a photon is not input;

reading, by sense circuitry, an electric signal from a photoelectric converting device of the pixel when the pixel is in the reset state;

reading, by the sense circuitry, an electric signal from the photoelectric converting device of the pixel when the pixel is exposed to an input photon;

adding, by the sense circuitry, an offset to one of the electric signal when the pixel is in the reset state or the electric signal when the pixel is exposed to the input photon;

making, by the sense circuitry, a binary decision on whether a photon is input to the pixel in a predetermined period upon reception of an electric signal therefrom, the making the binary decision including comparing the signal in the reset state and the signal after exposure, one of which is added with the offset;

integrating, by decision result circuitry, the binary decision results, pixel by pixel or for each group of pixels; and

storing, in memory, a counting result for each pixel.

Priority Claims (2)
JP 2009-197986 · Aug 28, 2009 · national
JP 2010-092076 · Apr 13, 2010 · national
Continuity (4)
Continuation 14470516 · Aug 27, 2014
Continuation 13930827 · Jun 28, 2013
Continuation 12846285 · Jul 29, 2010
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