IP Library › Granted Patent US 9,379,181
Granted Patent B2
US 9,379,181 · App. 14/258,251 · Granted Jun 28, 2016

Semiconductor device

Inventor: Masahiro Sugimoto (Toyota, JP)
Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA; DENSO CORPORATION
H01L29/0653H01L29/7804H01L29/0623H01L29/0696H01L29/1608H01L29/32H01L29/407H01L29/42368H01L29/66068H01L29/7397
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Quick Facts
Patent No.
US 9,379,181
App. No.
14/258,251
Granted
Jun 28, 2016
Kind
B2
Abstract

A semiconductor device is provided with a semiconductor substrate in which a power semiconductor element part and a temperature sensing diode part are provided. The temperature sensing diode part includes a first semiconductor region, a second semiconductor region, a first base region, and a first drift region. In the semiconductor substrate, an isolation trench is formed, which passes through the first base region, extends to the first drift region, and surrounds an outer periphery of the temperature sensing diode part. At least a part of one of side walls of the isolation trench is in contact with the power semiconductor element part, and the other side wall of the isolation trench is in contact with the temperature sensing diode part.

Claims (30)

1. A semiconductor device comprising:

a semiconductor substrate in which a power semiconductor element part and a temperature sensing diode part are provided, wherein

the temperature sensing diode part includes:

a first semiconductor region that is a first conductivity type and arranged in a range that faces an upper surface of the semiconductor substrate;

a second semiconductor region that is a second conductivity type and arranged in a region that faces the upper surface of the semiconductor substrate;

a third semiconductor region that is the first conductivity type and arranged in a range that faces the upper surface of the semiconductor substrate;

a fourth semiconductor region that is the second conductivity type and arranged in a range that faces the upper surface of the semiconductor substrate;

a first base region that is the first conductivity type, arranged in a range that faces the upper surface of the semiconductor substrate, and in contact with and surrounds the first semiconductor region and the second semiconductor region;

a first drift region that is the second conductivity type, in contact with a lower surface of the first base region, and isolated from the first semiconductor region and the second semiconductor region by the first base region,

a second base region that is the first conductivity type and in contact with lower surfaces of the third semiconductor region and the fourth semiconductor region;

a second drift region that is the second conductivity type, located below the second base region, and isolated from the third semiconductor region and the fourth semiconductor region by the second base region;

a first gate electrode that is arranged in a gate trench passing through the second base region and extending to the second drift region, and faces the second base region in a range that isolates the fourth semiconductor region and the second drift region from each other; and

a first insulator arranged between the first gate electrode and an inner wall of the gate trench,

an isolation trench is disposed in the semiconductor substrate, the isolation trench passing through the first base region, extending to the first drift region, and surrounding an outer periphery of the temperature sensing diode part, at least a part of one of side walls of the isolation trench is in contact with the power semiconductor element part, and the other side wall of the isolation trench is in contact with the temperature sensing diode part, and

a second insulator is arranged in the isolation trench,

wherein the thickness of the second insulator is larger than a thickness of the first insulator.

2. The semiconductor device according to claim 1 , wherein inside of the isolation trench is entirely filled with an insulator.

3. The semiconductor device according to claim 1 , wherein

the power semiconductor element part includes:

a second gate electrode that faces the second base region in the range isolating the fourth semiconductor region and the second drift region from each other on a side of one of the side walls of the isolation trench, and faces the first base region on a side of the other side w all of the isolation trench is arranged in the isolation trench,

the second insulator being arranged between the second gate electrode and the inner wall of the isolation trench, and

the thickness of the second insulator on the other side wall of the isolation trench is larger than the thickness of the second insulator on one of the side walls of the isolation trench.

4. The semiconductor device according to claim 1 , wherein

the temperature sensing diode part is provided with a buried layer of the first conductivity type, which is in contact with an upper surface of the first drift region and is in contact with the lower surface of the first base region, and the buried layer is in contact with at least the other side wall of the isolation trench.

5. The semiconductor device according to claim 1 , wherein

the temperature sensing diode part is provided with a buried layer of the first conductivity type, which is in contact with an upper surface of the first drift region and is in contact with the lower surface of the first base region, and the first drift region is arranged between the buried layer and the isolation trench.

6. The semiconductor device according to claim 1 , wherein

the first base region includes a lifetime killer.

7. The semiconductor device according to claim 1 , wherein

a material of the semiconductor substrate is SiC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2014
From: SUGIMOTO, MASAHIRO
To: TOYOTA JIDOSHA KABUSHIKI KAISHA; DENSO CORPORATION
Reel/Frame 032726/0298 →
Priority Claims (1)
JP 2013-092255 · Apr 25, 2013 · national
Continuity (1)
Related Publication 20140319540A1 · Oct 30, 2014