Amorphous oxide semiconductor thin film transistor fabrication method
This disclosure provides systems, methods and apparatus for fabricating thin film transistor (TFT) devices. In one aspect, a substrate having a source area, a drain area, and a channel area is provided. Metal cations are implanted in the oxide semiconductor layer overlying the source area and the drain area of the substrate. The metal cation implantation forms a doped n-type oxide semiconductor in the oxide semiconductor layer overlying the source area and the drain area of the substrate.
1. An apparatus comprising:
a substrate including a surface;
an oxide semiconductor layer on the substrate surface, the oxide semiconductor layer including a channel region, a source region, and a drain region, the source region and the drain region of the oxide semiconductor layer being doped n-type oxide semiconductor layers implanted with metal cations to a concentration of greater than about 10 19 atoms/cm 3 , wherein the metal cation implantation depth is equal to the thickness of the oxide semiconductor layer;
a first dielectric layer on the channel region of the oxide semiconductor layer; and
a first metal layer on the first dielectric layer.
2. The apparatus of claim 1 , wherein the metal cations are cations of a constituent metal of the oxide semiconductor layer.
3. The apparatus of claim 1 , wherein the oxide semiconductor layer includes one or more of indium (In), gallium (Ga), zinc (Zn), hafnium (Hf), and tin (Sn).
4. The apparatus of claim 1 , wherein the metal cations include one or more of indium cations (In+), gallium cations (Ga+), zinc cations (Zn+), hafnium cations (Hf+), and tin cations (Sn+).
5. The apparatus of claim 1 , further comprising a first contact contacting the source region; and a second contact contacting the drain region.
6. The apparatus of claim 1 , further comprising:
a first dielectric sidewall on a first side of the first dielectric layer and on a first side of the first metal layer and a second dielectric sidewall on a second side of the first dielectric layer and on a second side of the first metal layer, the first dielectric sidewall and the second dielectric sidewall overlying portions of the channel region of the oxide semiconductor layer.
7. The apparatus of claim 1 , further comprising:
a second dielectric layer, wherein the second dielectric layer is on the first metal layer, the source region of the oxide semiconductor layer, and the drain region of the oxide semiconductor layer.
8. The apparatus of claim 1 , wherein the substrate includes a glass substrate.
9. The apparatus of claim 1 , further comprising:
a display;
a processor that is configured to communicate with the display, the processor being configured to process image data; and
a memory device that is configured to communicate with the processor.
10. The apparatus of claim 9 , further comprising:
a driver circuit configured to send at least one signal to the display; and
a controller configured to send at least a portion of the image data to the driver circuit.
11. The apparatus of claim 9 , further comprising:
an image source module configured to send the image data to the processor, wherein the image source module includes at least one of a receiver, transceiver, and transmitter.
12. The apparatus of claim 9 , further comprising:
an input device configured to receive input data and to communicate the input data to the processor.
13. The apparatus of claim 9 , wherein the display is a liquid crystal display or an organic light-emitting diode display.
14. The apparatus of claim 1 , wherein the metal cations include one or more of gallium cations (Ga+), zinc cations (Zn+), hafnium cations (Hf+), and tin cations (Sn+).