Semiconductor device and communication system
View Patent ↗It is an object of the present invention to provide a semiconductor device in which a sophisticated integrated circuit using a polycrystalline semiconductor is formed over a substrate which is weak with heat such as a plastic substrate or a plastic film substrate and a semiconductor device which transmits/receives power or a signal without wires, and a communication system thereof. One feature of the invention is that a semiconductor device, specifically, a processor, in which a sophisticated integrated circuit is fixed to a plastic substrate which is weak with heat by a stripping method such as a stress peel of process method to transmit/receive power or a signal without wires, for example, with an antenna or a light receiving element.
1. A semiconductor device comprising:
a plastic substrate;
an adhesive agent over the plastic substrate;
a crystallized metal oxide comprising tungsten over the adhesive agent; and
a processor over the crystallized metal oxide, the processor comprising:
an integrated circuit comprising a voltage generation circuit and an arithmetic processing means; and
an antenna connected to the voltage generation circuit,
wherein the voltage generation circuit, the arithmetic processing means, and the antenna are in a layer which is fixed to the plastic substrate by the adhesive agent,
wherein the integrated circuit comprises a thin film transistor,
wherein a power supplied from a plurality of reader/writer devices is supplied to the voltage generation circuit through the antenna,
wherein the power is supplied to the arithmetic processing means,
wherein the arithmetic processing means is configured to perform floating point arithmetic, and
wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.
2. The semiconductor device according to claim 1 , wherein the arithmetic processing means comprises an arithmetic and logic unit and a register.
3. The semiconductor device according to claim 1 , wherein the plastic substrate is one selected from a group consisting of polycarbonate, polyarylate, and polyethersulfone.
4. The semiconductor device according to claim 1 , wherein the semiconductor device is incorporated into an electronic apparatus selected from a group consisting of a display panel, a computer, a telephone set, an IC tag and an IC card.
5. The semiconductor device according to claim 1 , wherein the integrated circuit comprises a storage means and an interface.
6. The semiconductor device according to claim 1 , wherein the arithmetic processing means is a central processing unit.
7. The semiconductor device according to claim 1 , wherein the processor has translucency.
8. The semiconductor device according to claim 1 , wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.
9. The semiconductor device according to claim 1 , wherein the crystallized metal oxide comprises WO 2 or WO 3 .
10. A semiconductor device comprising:
a plastic substrate;
an adhesive agent over the plastic substrate;
a crystallized metal oxide comprising tungsten over the adhesive agent; and
a processor over the crystallized metal oxide, the processor comprising:
an integrated circuit comprising a voltage generation circuit and an arithmetic processing means;
an antenna connected to the voltage generation circuit; and
a photodiode,
wherein the voltage generation circuit, the arithmetic processing means, the antenna, and the photodiode are in a layer which is fixed to the plastic substrate by the adhesive agent,
wherein the integrated circuit comprises a thin film transistor,
wherein a power supplied from a plurality of reader/writer devices is supplied to the voltage generation circuit through the antenna,
wherein the power is supplied to the arithmetic processing means,
wherein the arithmetic processing means is configured to perform floating point arithmetic, and
wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.
11. The semiconductor device according to claim 10 , wherein the arithmetic processing means comprises an arithmetic and logic unit and a register.
12. The semiconductor device according to claim 10 , wherein the plastic substrate is one selected from a group consisting of polycarbonate, polyarylate, and polyethersulfone.
13. The semiconductor device according to claim 10 , wherein the semiconductor device is incorporated into an electronic apparatus selected from a group consisting of a display panel, a computer, a telephone set, an IC tag and an IC card.
14. The semiconductor device according to claim 10 , wherein the integrated circuit comprises a storage means and an interface.
15. The semiconductor device according to claim 10 , wherein the arithmetic processing means is a central processing unit.
16. The semiconductor device according to claim 10 , wherein the processor has translucency.
17. The semiconductor device according to claim 10 , wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.
18. The semiconductor device according to claim 10 , wherein the crystallized metal oxide comprises WO 2 or WO 3 .
19. A semiconductor device comprising:
a plastic substrate;
an adhesive agent over the plastic substrate;
a crystallized metal oxide comprising tungsten over the adhesive agent; and
a plurality of processors over the crystallized metal oxide, each of the plurality of processors comprising:
an integrated circuit comprising a voltage generation circuit and an arithmetic processing means; and
an antenna connected to the voltage generation circuit,
wherein the plurality of processors are in a layer which is fixed to the plastic substrate by the adhesive agent,
wherein the integrated circuit comprises a thin film transistor,
wherein a power supplied from a reader/writer device is supplied to the voltage generation circuit through the antenna,
wherein the power is supplied to the arithmetic processing means,
wherein the arithmetic processing means is configured to perform floating point arithmetic, and
wherein a semiconductor film of the thin film transistor has a thickness of from 10 nm to 200 nm.
20. The semiconductor device according to claim 19 , wherein each of the plurality of processors has translucency.
21. The semiconductor device according to claim 19 , wherein the arithmetic processing means further comprises a reservation station which is configured to perform scheduling to execute a decoded instruction.
22. The semiconductor device according to claim 19 , wherein the crystallized metal oxide comprises WO 2 or WO 3 .