IP Library › Granted Patent US 9,389,875
Granted Patent B2
US 9,389,875 · App. 14/415,164 · Granted Jul 12, 2016

Selectable graphics controllers to display output

Inventors: Thong Thai (Houston, TX); Baraneedharan Anbazhagan (Houston, TX)
Assignee: Hewlett-Packard Development Company, L.P.
G06F9/4401G06F9/4411G06F9/463
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Quick Facts
Patent No.
US 9,389,875
App. No.
14/415,164
Granted
Jul 12, 2016
Kind
B2
Abstract

A computing system includes a plurality of graphics controllers, a reserved memory region, a shadow memory region, and a system Basic Input Output System (BIOS). The reserved memory region is to store a plurality of video Basic Input Output System (BIOS) images. The shadow memory region is to store a selected video BIOS image corresponding to a selected graphics controller, such that the selected graphics controller is to display output in response to a service request for video BIOS services, without use of a graphics driver. The system BIOS is to enable changing the selected graphics controller, based on copying a video BIOS image from the reserved memory region to the shadow memory region.

Claims (26)

1. A computing system comprising:

a plurality of graphics controllers;

a reserved memory region to store a plurality of video Basic Input Output System (BIOS) images;

a shadow memory region to store a selected video BIOS image corresponding to a selected graphics controller, such that the selected graphics controller is to display output in response to a service request for video BIOS services, without use of a graphics driver; and

a system Basic Input Output System (BIOS) to enable changing the selected graphics controller, based on copying a video BIOS image of the plurality of video BIOS images from the reserved memory region to the shadow memory region.

2. The computing system of claim 1 , further comprising an interrupt vector table, wherein the reserved memory region is to store a plurality of interrupt offsets corresponding respectively to the plurality of video BIOS images, and the system BIOS is to enable changing the selected graphics controller based on copying a corresponding interrupt offset from the reserved memory region to the interrupt vector table, such that the selected graphics controller is responsive to an interrupt service request for video BIOS services.

3. The computing system of claim 1 , further comprising an interrupt vector table pointing to a selected video BIOS offset in system memory that points to a selected video BIOS, wherein the reserved memory region is to store a plurality of interrupt offsets corresponding respectively to the plurality of video BIOS images, and the system BIOS is to enable changing the selected graphics controller based on copying a corresponding interrupt offset from the reserved memory region to the selected video BIOS offset, such that the selected graphics controller is responsive to an interrupt service request for video BIOS services.

4. The computing system of claim 1 , wherein, upon boot up of the computing system, the system BIOS is to dispatch, into the shadow memory region, and copy, to the reserved memory region, each of the plurality of video BIOS images.

5. The computing system of claim 1 , wherein, upon boot up of the computing system, the system BIOS is to dispatch, into the shadow memory region, and copy, to the reserved memory region, the selected video BIOS image after dispatching and copying the plurality of video BIOS images for non-selected graphics controllers.

6. The computing system of claim 1 , wherein, upon a change to a display connection status of the computing system, the system BIOS is to identify a displayable graphics controller from the plurality of graphics controllers, and copy a corresponding video BIOS image into the shadow memory region.

7. The computing system of claim 1 , wherein the selected graphics controller is to display output in response to an INT10 interrupt service request.

8. The computing system of claim 1 , wherein the shadow memory region is associated with a C0000 memory location.

9. A method, comprising:

identifying a first graphics controller selected from a plurality of available graphics controllers associated with a computing system, wherein the selected first graphics controller is to display output based on a selected first video basic input output system (BIOS);

dispatching, to a shadow memory region of the computing system, a second video BIOS associated with a second graphics controller from the plurality of available graphics controllers;

saving, to a reserved memory region of the computing system, the dispatched second video BIOS;

dispatching, to the shadow memory region, the selected first video BIOS associated with the selected first graphics controller, such that the selected first graphics controller is to display output in response to a service request for video BIOS services, without use of a graphics driver.

10. The method of claim 9 , further comprising saving, to the reserved memory region, the dispatched selected first video BIOS and a selected first interrupt offset associated with the dispatched selected first video BIOS.

11. The method of claim 9 , wherein dispatching the selected first video BIOS further comprises updating an interrupt vector table by loading, into the interrupt vector table, an interrupt offset corresponding to the dispatched selected first video BIOS.

12. The method of claim 9 , further comprise dynamically allocating and reserving the shadow memory region based on a largest dispatched video BIOS size.

13. A non-transitory machine-readable storage medium encoded with instructions executable by a computing system that, when executed, cause the computing system to:

store, in a reserved memory region, a plurality of video Basic Input Output System (BIOS) images corresponding to a plurality of graphics controllers;

store, in a shadow memory region, a selected video BIOS image corresponding to a selected graphics controller, such that the selected graphics controller is to display output in response to a service request for video BIOS services, without use of a graphics driver; and

copy, using a system Basic Input Output System (BIOS), a video BIOS image of the plurality of video BIOS images from the reserved memory region to the shadow memory region to change the selected graphics controller.

14. The non-transitory machine-readable storage medium of claim 13 , further comprising instructions that cause the computing system to read a state of connected displays to identify the selected graphics controller, based on at least one of: a General Purpose Input/Output (GPIO) to indicate a display connect status via a Hot Plug Detection (HPD) for digital displays, a lid state for an internal display panel, a GPIO attached to cable ground for a VGA display, and internal graphics controller registers that represent display connect status.

15. The non-transitory machine-readable storage medium of claim 13 , further comprising instructions that cause the computing system to identify the selected graphics controller based on a priority associated with a display connected to the selected graphics controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2015
From: THAI, THONG; ANBAZHAGAN, BARANEEDHARAN
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 034733/0255 →
Continuity (1)
Related Publication 20150205616A1 · Jul 23, 2015