Vertical semiconductor device having semiconductor mesas with side walls and a PN-junction extending between the side walls
A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.
1. A vertical semiconductor device, comprising:
a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the semiconductor body comprising in an active area a plurality of spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the semiconductor mesas comprising a first side wall, a second side wall, a first pn-junction extending between the first side wall and the second side wall, and a conductive region in Ohmic contact with the semiconductor mesa and extending from the main surface into the semiconductor mesa;
a plurality of gate electrodes insulated from the semiconductor body, each of the gate electrodes arranged between a pair of adjacent semiconductor mesas and extending in the vertical direction across the first pn-junctions of the adjacent semiconductor mesas; and
a backside metallization arranged on the backside.
2. The vertical semiconductor device of claim 1 , wherein the conductive regions are substantially centered with the respect to the semiconductor mesas when viewed from above.
3. The vertical semiconductor device of claim 1 , further comprising an additional gate electrode insulated from and adjacent to an outermost semiconductor mesa and extending into the peripheral area.
4. The vertical semiconductor device of claim 1 , further comprising shallow trenches etched into the semiconductor mesas from the main surface so that the shallow trenches do not extend to the first pn-junction.
5. The vertical semiconductor device of claim 4 , wherein the conductive regions are disposed in the shallow trenches.
6. The vertical semiconductor device of claim 1 , further comprising deep trenches etched into the semiconductor body from the main surface, wherein the semiconductor mesas are disposed between adjacent ones of the deep trenches.
7. The vertical semiconductor device of claim 6 , wherein the gate electrodes are disposed in the deep trenches.