IP Library › Granted Patent US 9,419,104
Granted Patent B2
US 9,419,104 · App. 14/568,819 · Granted Aug 16, 2016

Semiconductor device and method of manufacturing the same

Inventor: Lei Fang (Shanghai, CN)
Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
H01L29/66704H01L29/0653H01L29/407H01L29/4236H01L29/66659H01L29/66689H01L29/7825H01L29/7835H01L29/42376
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,419,104
App. No.
14/568,819
Granted
Aug 16, 2016
Kind
B2
Abstract

A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a P-well and an N-well disposed in the semiconductor substrate, a source disposed in the N-well and a drain disposed in the P-well, a shallow trench isolation (STI) structure disposed in the P-well, a gate structure disposed on the semiconductor substrate, wherein a portion of the gate structure extends into the semiconductor substrate and is disposed in a location corresponding to the STI structure.

Claims (17)

1. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate;

forming a shallow trench isolation (STI) structure in the semiconductor substrate, wherein the STI structure is disposed in a location corresponding to where a P-well is to be formed;

performing ion implantation to form the P-well and an N-well in the semiconductor substrate, wherein the P-well is formed surrounding side and bottom portions of the STI structure;

forming a recess in the STI structure;

forming a gate structure on the semiconductor substrate, wherein a portion of the gate structure extends into the recess; and

performing ion implantation to form a source in the N-well and a drain in the P-well.

2. The method according to claim 1 , wherein forming the recess further comprises:

forming the recess by etching a portion of the STI structure, the portion of the STI structure having a predetermined thickness.

3. The method according to claim 2 , wherein the predetermined thickness ranges from about one-third to about half of a thickness of the un-etched STI structure.

4. The method according to claim 1 , wherein after forming the gate structure and prior to performing the ion implantation, the method further comprising:

forming spacers on opposite sides of the gate structure.

5. The method according to claim 1 , further comprising:

performing ion implantation to form an electrode in the N-well.

6. The method according to claim 1 , wherein the recess exposes at least one inner sidewall of the P-well.

7. The method according to claim 6 , wherein the recess exposes two inner opposite sidewalls of the P-well.

8. The method according to claim 1 , wherein the recess is disposed within the STI structure without exposing any inner sidewall of the P-well.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2014
From: FANG, LEI
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 034495/0738 →
Priority Claims (1)
CN 2014 1 0228115 · May 27, 2014 · national
Continuity (1)
Related Publication 20150349050A1 · Dec 3, 2015