Junctionless tunnel fet with metal-insulator transition material
Embodiments of the present disclosure provide an integrated circuit (IC) structure, which can include: a doped semiconductor layer having a substantially uniform doping profile; a first gate structure positioned on the doped semiconductor layer; and a second gate structure positioned on the doped semiconductor layer, the second gate structure including a metal-insulator transition material and a gate dielectric layer separating the metal-insulator transition material from the doped semiconductor layer.
1. An integrated circuit (IC) structure comprising:
a doped semiconductor layer having a substantially uniform doping profile;
a first gate structure electrically coupled to the doped semiconductor layer; and
a second gate structure electrically coupled to the doped semiconductor layer, the second gate structure including a metal-insulator transition material and a gate dielectric layer separating the metal-insulator transition material from the doped semiconductor layer wherein a separation distance between the first gate material and the second gate material is larger than a separation distance between the second gate material and the source contact.
2. The IC structure of claim 1 , wherein the metal-insulator transition material comprises vanadium oxide.
3. The IC structure of claim 1 , wherein the first gate structure further includes the gate dielectric layer separating a gate conductor from the doped semiconductor layer.
4. The IC structure of claim 1 , wherein a separation distance between the first gate structure and the second gate structure is between approximately two nanometers (nm) and approximately five nm.
5. The IC structure of claim 1 , wherein the doped semiconductor layer comprises one of a plurality of doped semiconductor fins in a finFET structure.
6. The IC structure of claim 1 , further comprising a first contact electrically coupled to an end of the doped semiconductor layer; and a second contact electrically coupled to an opposing end of the doped semiconductor layer, the substantially uniform doping profile being present throughout an electrical connection between the first contact and the second contact through the doped semiconductor layer.
7. The IC structure of claim 6 , wherein a separation distance between the second gate structure and the one of the first contact and the second contact is larger than a separation distance between the second gate structure and the other of the first contact and the second contact.
8. The IC structure of claim 1 , wherein a voltage bias applied to the first gate structure creates a difference in electric potential between the second gate material and the doped semiconductor layer and increases a conductivity of the second gate material.
9. The IC structure of claim 1 , wherein the substantially uniform doping profile of the doped semiconductor layer is between approximately 1.0×10 19 atoms per cubic centimeter (atoms/cm 3 ) and approximately 3.0×10 19 atoms/cm 3 .
10. An integrated circuit (IC) structure comprising:
a doped semiconductor layer having a substantially uniform doping profile;
a first gate structure contacting the doped semiconductor layer and including:
a first gate material contacting a dielectric layer, and
a dielectric layer positioned between the first gate material and the doped semiconductor layer; and
a second gate structure contacting the doped semiconductor layer, the second gate structure including:
a second gate material including a metal-insulator transition material therein, and
the dielectric layer, wherein the dielectric layer is positioned between the metal-insulator transition material and the doped semiconductor layer;
wherein a voltage bias applied to the first gate structure increases a temperature and a conductivity of the metal-insulator transition material.
11. The IC structure of claim 10 , wherein a work function of the first gate material is between approximately 4.3 electron-volts (eV) and approximately 4.6 eV.