IP Library › Granted Patent US 9,424,041
Granted Patent B2
US 9,424,041 · App. 13/836,392 · Granted Aug 23, 2016

Efficient way to cancel speculative ‘source ready’ in scheduler for direct and nested dependent instructions

Inventors: Ravi Iyengar (Austin, TX); Bradley Gene Burgess (Austin, TX); Sandeep Kumar Dubey (Austin, TX)
Assignee: Samsung Electronics Co., Ltd.
G06F9/30181G06F9/3838G06F9/3842G06F9/3836
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Quick Facts
Patent No.
US 9,424,041
App. No.
13/836,392
Granted
Aug 23, 2016
Kind
B2
Abstract

A method and apparatus for simultaneously canceling a dependent instruction and a nested dependent instruction when a cancel timer of a source of the dependent instruction and a cancel timer of a source of the nested dependent instruction expire and a producer instruction speculatively waking up the dependent instruction is canceled.

Claims (41)

1. A method of processing a plurality of instructions, the method comprising:

speculatively waking up a source of a dependent instruction by a producer instruction of the dependent instruction;

speculatively waking up, by the dependent instruction, a source of a nested dependent instruction depending on the dependent instruction;

setting a source ready bit of the source of the dependent instruction and setting a source ready bit of the source of the nested dependent instruction to indicate that the source of the dependent instruction and the source of the nested dependent instruction are ready for access;

setting a cancel timer of the source of the dependent instruction for controlling cancellation of selectability of the dependent instruction for execution by an instruction scheduler and setting a cancel timer of the source of the nested dependent instruction for controlling cancellation of selectability of the nested dependent instruction for execution by the instruction scheduler, based on a number of cycles at which a cancel instruction is expected to be asserted for canceling the producer instruction; and

simultaneously canceling the dependent instruction and the nested dependent instruction to indicate that the dependent instruction and the nested dependent instruction are unavailable to be selected for execution by the instruction scheduler if (i) the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction expire and (ii) the producer instruction is canceled according to a received cancel instruction corresponding to a cancel indicator of the producer instruction,

wherein the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction expire when the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction reach a predetermined value.

2. The method of claim 1 , wherein the predetermined value is a non-zero value.

3. The method of claim 1 , further comprising:

resetting the source ready bit of the source of the dependent instruction and the source ready bit of the source of the nested dependent instruction to indicate that the dependent instruction and the nested dependent instruction are unavailable to be selected for execution by the instruction scheduler unless the dependent instruction and the nested dependent instruction are woken up again.

4. The method of claim 3 , further comprising:

resetting the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction.

5. The method of claim 3 , wherein resetting is performed after the simultaneously canceling of the dependent instruction and the nested dependent instruction.

6. The method of claim 5 , wherein the nested dependent instruction is woken up by the dependent instruction a predetermined time after the dependent instruction is speculatively woken up by the producer instruction, and

wherein the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction are set to different values based on the number of cycles at which the cancel instruction is expected to be asserted for canceling the producer instruction.

7. The method of claim 1 , wherein the nested dependent instruction is woken up by the dependent instruction a predetermined time after the dependent instruction is speculatively woken up by the producer instruction, and

wherein the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction are set to different values based on the number of cycles at which the cancel instruction is expected to be asserted for canceling the producer instruction.

8. The method of claim 1 , wherein the producer instruction is speculatively picked.

9. The method of claim 1 , wherein the setting the cancel timer of the source of the dependent instruction comprises setting the cancel timer of the source of the dependent instruction based on the number of cycles at which the cancel instruction is expected to be asserted for the producer instruction from a time of speculatively waking up the source of the dependent instruction by the producer instruction, and

wherein the setting the cancel timer of the source of the nested dependent instruction comprises setting the cancel timer of the source of the nested dependent instruction based on the number of clock cycles at which the cancel instruction is expected to be asserted for the producer instruction from a time of speculatively waking up the source of the nested dependent instruction by the producer instruction.

10. An apparatus for instruction processing, the apparatus comprising:

an instruction scheduler configured to a producer instruction for scheduling execution; and

a controller configured to:

speculatively wake up a source of a dependent instruction by a producer instruction of the dependent instruction;

speculatively wake up a source of a nested dependent instruction depending on the dependent instruction;

set a source ready bit of the source of the dependent instruction and a source ready bit of the source of the nested dependent instruction to indicate that the source of the dependent instruction and the source of the nested dependent instruction are ready for access;

set a cancel timer of the source of the dependent instruction for controlling cancellation of selectability of the dependent instruction for execution by the instruction scheduler and a cancel timer of the source of the nested dependent instruction for controlling cancellation of selectability of the nested dependent instruction for execution by the instruction scheduler, based on a number of cycles at which a cancel instruction is expected to be asserted for canceling the producer instruction; and

simultaneously cancel the dependent instruction and the nested dependent instruction to indicate that the dependent instruction and the nested dependent instruction are unavailable to be selected for execution by the instruction scheduler if (i) the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction expire and (ii) the producer instruction is canceled according to a received cancel instruction corresponding to a cancel indicator of the producer instruction,

wherein the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction expire when the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction reach a predetermined value.

11. The apparatus of claim 10 , wherein the predetermined value is a non-zero value.

12. The apparatus of claim 10 , wherein the controller is further configured to reset the source ready bit of the source of the dependent instruction and the source ready bit of the source of the nested dependent instruction to indicate that the dependent instruction and the nested dependent instruction are unavailable to be selected for execution by the instruction scheduler unless the dependent instruction and the nested dependent instruction are woken up again.

13. The apparatus of claim 12 , wherein the controller is further configured to reset the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction.

14. The apparatus of claim 12 , wherein the controller is configured to reset the source ready bit of the source of the dependent instruction and the source ready bit of the source of the nested dependent instruction after simultaneously canceling the dependent instruction and the nested dependent instruction.

15. The apparatus of claim 14 , wherein the nested dependent instruction is woken up by the dependent instruction a predetermined time after the dependent instruction is speculatively woken up by the producer instruction, and

wherein the controller is further configured to set the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction to different values based on the number of cycles at which the cancel instruction is expected to be asserted for canceling the producer instruction.

16. The apparatus of claim 10 , wherein the nested dependent instruction is woken up by the dependent instruction a predetermined time after the dependent instruction is speculatively woken up by the producer instruction, and

wherein the controller is further configured to set the cancel timer of the source of the dependent instruction and the cancel timer of the source of the nested dependent instruction to different values based on the number of cycles at which the cancel instruction is expected to be asserted for canceling the producer instruction.

17. The apparatus of claim 10 , wherein the producer instruction is speculatively picked.

18. The apparatus of claim 10 , wherein the controller is further configured to determine the cancel timer of the source of the dependent instruction comprises setting the cancel timer of the source of the dependent instruction based on the number of cycles at which the cancel instruction is expected to be asserted for the producer instruction from a time of speculatively waking up the dependent instruction by the producer instruction, and

wherein the controller is further configured to determine the cancel timer of the source of the nested dependent instruction based on the number of clock cycles at which the cancel instruction is expected to be asserted for the producer instruction from a time of speculatively waking up the source of the nested dependent instruction by the producer instruction.

19. The apparatus of claim 10 , wherein the source ready bit of the source of the dependent instruction, the source ready bit of the source of the nested dependent instruction, the cancel timer of the source of the dependent instruction, and the cancel timer of the source of the nested dependent instruction are set as entries of the instruction scheduler.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2013
From: IYENGAR, RAVI; BURGESS, BRADLEY GENE; DUBEY, SANDEEP KUMAR
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 030015/0531 →
Continuity (1)
Related Publication 20140281431A1 · Sep 18, 2014