IP Library Granted Patent US 9,431,529
Granted Patent B2
US 9,431,529 · App. 14/625,376 · Granted Aug 30, 2016

Confined semi-metal field effect transistor

Inventors: Ryan M. Hatcher (Round Rock, TX); Jorge A. Kittl (Round Rock, TX); Robert C. Bowen (Austin, TX)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L29/78H01L29/0669H01L29/66477
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,431,529
App. No.
14/625,376
Granted
Aug 30, 2016
Kind
B2
Abstract

Exemplary embodiments are disclosed for a semi-metal transistor, comprising: a semi-metal contact region adjacent to a metal contact; at least one semiconductor terminal; and a semi-metal transition region connected between the contact region and the semiconductor terminal that transitions from a substantially zero gap semi-metal beginning at an interface of the contact region into a semiconductor with an energy band gap towards the semiconductor terminal.

Claims (29)

1. A semi-metal transistor, comprising:

a semi-metal contact region adjacent to a metal contact;

at least one semiconductor terminal; and

a semi-metal transition region connected between the semi-metal contact region and the at least one semiconductor terminal, wherein the semi-metal transition region transitions from a substantially zero gap semi-metal beginning at an interface of the semi-metal contact region and the semi-metal transition region into a semiconductor with an energy band gap towards the at least one semiconductor terminal.

2. The semi-metal transistor of claim 1 , wherein dimensions of the semi-metal contact region between the metal contact and the semi-metal transition region are configured such that there is no significant confinement for the semi-metal contact region so that the band gap is substantially zero at an interface of the semi-mental contact region and the mental contact, such that substantially no Schottky Barrier is formed.

3. The semi-metal transistor of claim 1 , wherein dimensions of the semi-metal transition region gradually reduce in width starting from the interface with the semi-metal contact region towards the at least one semiconductor terminal to open a gap by confinement.

4. The semi-metal transistor of claim 3 , wherein the dimensions of the semi-metal transition region gradually reduce in both height and width starting from the interface with the semi-metal contact region towards the at least one semiconductor terminal.

5. The semi-metal transistor of claim 3 , wherein a smooth compositional gradient is used in combination with the gradual reduction in dimensions of the semi-metal transition region to change the band gap from substantially zero to a band gap greater than zero at the semiconductor.

6. The semi-metal transistor of claim 1 , wherein the semi-metal transition region comprises a compositional gradient to aid transition from the substantially zero gap semi-metal starting at the interface with the semi-metal contact region to the semiconductor with the energy band gap towards the at least one semiconductor terminal.

7. The semi-metal transistor of claim 6 , wherein the semi-metal transition region is highly doped.

8. The semi-metal transistor of claim 7 , wherein highly doped comprises doping levels greater than 2×10 19 cm −3 .

9. The semi-metal transistor of claim 1 , wherein the semi-metal transistor comprises a semi-metal material that has a band gap of less than 150 meV in bulk form.

10. The semi-metal transistor of claim 9 , wherein the semi-metal material is used for a channel, source/drain terminals, and source/drain transition regions of the semi-metal transistor.

11. The semi-metal transistor of claim 9 , wherein the semi-metal material is configured as at least one of a planar transistor, a FinFET, a nanowire, a nanosheet and a stacked nanosheet transistor.

12. The semi-metal transistor of claim 11 , wherein the semi-metal material is configured as a nanowire transistor having a substantially a circular cross-section, and wherein the energy band gap is induced by gradually confining the radius of the nanowire in the semi-metal transition region.

13. A method of providing a semi-metal transistor, comprising:

placing a semi-metal contact region adjacent to a metal contact; and

connecting a semi-metal transition region between the semi-metal contact region and a semiconductor terminal, wherein the semi-metal transition region transitions from a substantially zero gap semi-metal beginning at an interface of the seim-metal contact region and the semi-metal transition region into a semiconductor with an energy band gap towards the semiconductor terminal.

14. The method of claim 13 , configuring dimensions of the semi-metal contact region between the metal contact and the semi-metal transition region such that there is no significant confinement for the semi-metal so that the band gap is substantially zero at an interface of the semi-metal contact region and the mental contact, such that substantially no Schottky Barrier is formed.

15. The method of claim 13 , further comprising gradually reducing dimensions of the semi-metal transition region in width starting from the interface with the semi-mental contact region towards the semi-conductor terminal to open a gap by confinement.

16. The method of claim 15 , further comprising gradually reducing dimensions of the semi-metal transition region in both height and width starting from the interface with the semi-metal contact region towards the semiconductor terminal.

17. The method of claim 15 , further comprising using a smooth compositional gradient in combination with the gradual reduction in dimensions of the semi-metal transition region to change the band gap from substantially zero to a band gap greater than zero at the semiconductor.

18. The method of claim 13 , wherein the semi-metal transition region comprises a compositional gradient to aid transition from the substantially zero gap semi-metal starting at the interface with the semi-metal contact region to the semiconductor with the energy band gap towards the at least one semiconductor terminal.

19. The method of claim 18 , further comprising highly doping the semi-metal transition region.

20. The method of claim 19 , wherein highly doped comprises doping levels greater than 2×10 19 cm −3 .

21. The method of claim 13 , wherein semi-metal material transistor comprises a semi-metal material that has a band gap of less than 150 meV in bulk form.

22. The method of claim 21 , further comprising using the semi-metal material for a channel, source/drain terminals, and source/drain transition regions of semi-metal material transistor.

23. The method of claim 21 , further comprising configuring the semi-metal material as at least one of a planar transistor, a FinFET, a nanowire, a nanosheet and a stacked nanosheet transistor.

24. The method of claim 23 , further comprising configuring the semi-metal material as a nanowire transistor having a substantially a circular cross-section, and wherein the energy band gap is induced by gradually confining the radius of the nanowire in the semi-metal transition region.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE THIRD INVENTOR PREVIOUSLY RECORDED AT REEL: 035025 FRAME: 0045. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Dec 14, 2017
From: HATCHER, RYAN M.; KITTL, JORGE A.; BOWEN, ROBERT C.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 044913/0288 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2015
From: HATCHER, RYAN M.; KITTL, JORGE A.; BROWN, ROBERT C.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 035025/0045 →
Continuity (2)
Provisional Application 62047221 · Sep 8, 2014
Related Publication 20160071970A1 · Mar 10, 2016