IP Library › Granted Patent US 9,437,746
Granted Patent B2
US 9,437,746 · App. 14/562,540 · Granted Sep 6, 2016

Thin film transistor substrate having metal oxide semiconductor and method for manufacturing the same

Inventors: Kisul Cho (Gumi-si, KR); Seongmoh Seo (Suwon-si, KR)
Assignee: LG Display Co., Ltd.
H01L29/7869G02F1/1368G02F1/133514G02F1/134336G02F1/134363G02F1/136227G02F1/136286H01L23/53228H01L23/53238H01L27/124H01L27/1225H01L29/66742H01L29/786G02F2001/133519G02F2001/134372G02F2001/136222H01L2924/0002
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Quick Facts
Patent No.
US 9,437,746
App. No.
14/562,540
Granted
Sep 6, 2016
Kind
B2
Abstract

The present disclosure relates to a thin film transistor substrate with a metal oxide semiconductor layer that has enhanced characteristics and stability. The present disclosure also relates to a method for manufacturing a thin film transistor substrate in which a thermal treatment is conducted for the metal oxide semiconductor layer and the damages to the substrate by the thermal treatment are minimized.

Claims (20)

1. A thin film transistor substrate, comprising:

a gate electrode formed on a substrate;

a gate insulating layer covering first portions of the gate electrode and exposing second portions of the gate electrode;

a flat semiconductor active layer overlapping with the first portions of the gate electrode on the gate insulating layer;

a passivation layer directly contacting the flat semiconductor active layer;

a gate line contacting the second portions of the gate electrode and running in a horizontal direction on the substrate;

an intermediate insulating layer exposing middle portions of the flat semiconductor active layer and covering the gate line and the gate electrode;

a data line running in a vertical direction on the substrate on the intermediate insulating layer;

a source electrode branching from the data line and contacting a side of the flat semiconductor active layer; and

a drain electrode facing the source electrode, separated by a predetermined distance from the source electrode, and contacting another side of the flat semiconductor active layer.

2. The thin film transistor substrate according to claim 1 , further comprising:

a pixel contact hole exposing portions of the drain electrode by penetrating the passivation layer; and

a pixel electrode contacting the drain electrode through the pixel contact hole.

3. The thin film transistor substrate according to claim 2 , further comprising:

a color filter layer disposed on the passivation layer and under the pixel electrode; and

an overcoat layer disposed under the pixel electrode and covering the color filter layer.

4. The thin film transistor substrate according to claim 3 , wherein the color filter layer is filled with the inside area of a pixel area surrounded by the gate line and the data line, and is covering areas corresponding to the thin film transistor including the flat semiconductor active layer.

5. The thin film transistor substrate according to claim 1 , wherein the gate line includes a copper material.

6. The thin film transistor substrate according to claim 1 , wherein the data line includes a low resistance layer having copper and a protective layer having molybdenum.

7. The thin film transistor substrate according to claim 1 , wherein the passivation layer covers the source electrode and the drain electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2014
From: CHO, KISUL; SEO, SEONGMOH
To: LG DISPLAY CO., LTD.
Reel/Frame 034429/0173 →
Priority Claims (1)
KR 10-2012-0068440 · Jun 26, 2012 · national
Continuity (2)
Division 13717564 · Dec 17, 2012
Related Publication 20150091006A1 · Apr 2, 2015