IP Library Granted Patent US 9,443,777
Granted Patent B2
US 9,443,777 · App. 14/401,367 · Granted Sep 13, 2016

Semiconductor element housing package, semiconductor device, and mounting structure

Inventors: Mahiro Tsujino (Kyoto, JP); Toshihiko Kitamura (Kyoto, JP)
Assignee: KYOCERA CORPORATION
H01L23/055H01L23/13H01L23/34H01L23/36H01L23/50H01L2924/0002
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Quick Facts
Patent No.
US 9,443,777
App. No.
14/401,367
Granted
Sep 13, 2016
Kind
B2
Abstract

A semiconductor element housing package includes a rectangular ceramic package having a recess section on an upper surface thereof or a penetration section from the upper surface to a lower surface thereof, and a heat radiation plate attached to the lower surface of the ceramic package, extending from one side toward the other side of the lower surface up to a region in which the heat radiation plate overlays the recess section or the penetration section, which plate has a width on a side of the other side which is narrower than that on a side of one side. The package includes a plurality of first lead pins disposed on the lower surface of the ceramic package along the other side, and a pair of second lead pins disposed on the lower surface of the ceramic package on both sides of a narrow portion of the heat radiation plate.

Claims (18)

1. A semiconductor element housing package, comprising:

a rectangular ceramic package having an upper surface, a lower surface and a penetration section which penetrates therethrough from the upper surface to the lower surface thereof;

a heat radiation plate attached to the lower surface of the ceramic package, extending from one side toward the other side of the lower surface so as to close a lower opening of the penetration section, the heat radiation plate having a width on a side of the other side which is narrower than that on a side of one side;

a plurality of first lead pins disposed on the lower surface of the ceramic package along the other side; and

a pair of second lead pins disposed on the lower surface of the ceramic package on both sides of a narrow portion of the heat radiation plate,

no lead pin being disposed in a region of the lower surface other than a region in which the plurality of first lead pins and the pair of second lead pins are disposed.

2. The semiconductor element housing package according to claim 1 ,

wherein curved notches are provided on both sides in a width direction of the narrow portion of the heat radiation plate, and the pair of second lead pins are disposed on portions of the lower surface of the ceramic package corresponding to the curved notches.

3. A semiconductor device, comprising:

the semiconductor element housing package according to claim 1 ; and

a semiconductor element that is inserted in the penetration section and mounted to the heat radiation plate of the semiconductor element housing package.

4. A mounting structure, comprising:

the semiconductor device according to claim 3 ; and

a mounting substrate on which the semiconductor device is mounted,

signal lines to be connected to the first lead pins being formed on an upper surface of the mounting substrate, and a ground layer to be connected to the second lead pins being formed on a lower surface thereof.

5. The mounting structure according to claim 4 ,

wherein the mounting substrate comprises a film-shaped insulation sheet, and

the signal lines are formed on an upper surface of the insulation sheet, and the ground layer is formed on a lower surface of the insulation sheet.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2014
From: TSUJINO, MAHIRO; KITAMURA, TOSHIHIKO
To: KYOCERA CORPORATION
Reel/Frame 034196/0967 →
Priority Claims (1)
JP 2012-114384 · May 18, 2012 · national
Continuity (1)
Related Publication 20150130043A1 · May 14, 2015