IP Library Granted Patent US 9,450,071
Granted Patent B2
US 9,450,071 · App. 12/923,266 · Granted Sep 20, 2016

Field effect semiconductor devices and methods of manufacturing field effect semiconductor devices

Inventors: Ki-ha Hong (Cheonan-si, KR); Jong-seob Kim (Hwaseong-si, KR); Jae-joon Oh (Seongnam-si, KR); Jai-kwang Shin (Anyang-si, KR); Hyuk-soon Choi (Hwaseong-si, KR); In-jun Hwang (Hwaseong-si, KR); Ho-jung Kim (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L29/66462H01L29/42316H01L29/7787H01L29/2003
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Quick Facts
Patent No.
US 9,450,071
App. No.
12/923,266
Granted
Sep 20, 2016
Kind
B2
Abstract

Field effect semiconductor devices and methods of manufacturing the same are provided, the field effect semiconductor devices include a second semiconductor layer on a first surface of a first semiconductor layer, a first and a second third semiconductor layer respectively on two sides of the second semiconductor layer, a source and a drain respectively on the first and second third semiconductor layer, and a gate electrode on a second surface of the first semiconductor layer.

Claims (35)

1. A field effect semiconductor device, comprising:

a second semiconductor layer on a first surface of a first semiconductor layer;

a first and a second third semiconductor layer respectively on the second semiconductor layer;

a source and a drain directly on the first and second third semiconductor layer; and

a gate electrode on a second surface of the first semiconductor layer, wherein the gate electrode is on an opposing side of the first semiconductor layer away from the source and the drain,

wherein the gate electrode has a double gate structure, and

wherein the double gate structure of the gate electrode includes

a first gate electrode directly on a portion of the second surface of the first semiconductor layer,

an insulating layer directly covering the first gate electrode, and

a second gate electrode directly on the insulating layer and the second surface of the first semiconductor layer,

wherein the second gate electrode is positioned on an opposite side of the insulating layer with respect to the first gate electrode, and

the insulating layer is in contact with a bottom surface of the first gate electrode opposite to the second surface of the first semiconductor layer, and in contact with a top surface of the second gate electrode.

2. The field effect semiconductor device of claim 1 , wherein a distance between the first gate electrode and the drain is greater than a distance between the first gate electrode and the source.

3. The field effect semiconductor device of claim 1 , wherein the first semiconductor layer and the first and second third semiconductor layers are formed of a material having a greater band gap energy than a material used to form the second semiconductor layer.

4. The field effect semiconductor device of claim 1 , wherein the first semiconductor layer, the second semiconductor layer and the first and second third semiconductor layers are formed of a gallium nitride (GaN)-based semiconductor material.

5. The field effect semiconductor device of claim 4 , wherein the first semiconductor layer and the first and second third semiconductor layers are formed of Al x Ga 1-x N (wherein 0<x<1).

6. The field effect semiconductor device of claim 4 , wherein the second semiconductor layer is formed of GaN.

7. The field effect semiconductor device of claim 1 , wherein the first semiconductor layer, the second semiconductor layer and the first and second third semiconductor layers are formed of Group III-V semiconductor compounds.

8. The field effect semiconductor device of claim 1 , wherein the first and second third semiconductor layers each contacts the second semiconductor layer.

9. The field effect semiconductor device of claim 1 , wherein the first and second third semiconductor layers are spaced apart from each other.

10. The field effect semiconductor device of claim 1 , wherein the first third semiconductor layer is on a different surface of the second semiconductor layer than the second third semiconductor layer.

11. A method of manufacturing a field effect semiconductor device, the method comprising:

forming a buffer layer, a first semiconductor layer, a second semiconductor layer and a first and second third semiconductor layer on a substrate, wherein the second semiconductor layer is on a first surface of the first semiconductor layer, and the first and a second third semiconductor layer are respectively on the second semiconductor layer;

forming a source and a drain directly on the first and second third semiconductor layer by coating a conductive material on a third semiconductor layer and etching the conductive material and the third semiconductor layer so that end portions of the conductive material remain to form the source and the drain, so that end portions of the third semiconductor layer remain, and so as to expose a portion of the second semiconductor layer;

removing the substrate and the buffer layer so as to expose a second surface of the first semiconductor layer; and

forming a gate electrode on the second surface of the first semiconductor layer, wherein the gate electrode is on an opposing side of the first semiconductor layer away from the source and the drain and has a double gate structure,

wherein forming the gate electrode having the double gate structure includes

forming a first gate electrode directly on a portion of the second surface of the first semiconductor layer;

forming an insulating layer directly covering the first gate electrode; and

forming a second gate electrode directly on the insulating layer and the second surface of the first semiconductor layer,

wherein the second gate electrode is positioned on an opposite side of the insulating layer with respect to the first gate electrode, and

the insulating layer is in contact with a bottom surface of the first gate electrode opposite to the second surface of the first semiconductor layer, and in contact with a top surface of the second gate electrode.

12. The method of claim 11 , wherein the first gate electrode is formed at a greater distance from the drain than a distance between the first gate electrode and the source.

13. The method of claim 11 , wherein the first semiconductor layer and the third semiconductor layer are formed of a material having a greater band gap energy than a material used to form the second semiconductor layer.

14. The method of claim 11 , wherein the first semiconductor layer, the second semiconductor layer and the third semiconductor layer are formed of a GaN-based semiconductor material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2010
From: HONG, KI-HA; KIM, JONG-SEOB; OH, JAE-JOON; SHIN, JAI-KWANG; CHOI, HYUK-SOON; HWANG, IN-JUN; KIM, HO-JUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 025199/0341 →
Priority Claims (1)
KR 10-2009-0085874 · Sep 11, 2009 · national
Continuity (1)
Related Publication 20110062448A1 · Mar 17, 2011