IP Library › Granted Patent US 9,455,355
Granted Patent B2
US 9,455,355 · App. 14/888,780 · Granted Sep 27, 2016

Semiconductor device

Inventors: Eiko Otsuki (Tokyo, JP); Koji Sadamatsu (Tokyo, JP); Yasuhiro Yoshiura (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L29/861H01L29/0619H01L29/0638H01L29/0661H01L29/0696H01L29/0834H01L29/7395H01L29/8611H01L2924/12036
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Quick Facts
Patent No.
US 9,455,355
App. No.
14/888,780
Granted
Sep 27, 2016
Kind
B2
Abstract

An n − -type semiconductor substrate ( 1 ) includes an active region and a terminal region disposed outside the active region. A p + -type anode layer ( 2 ) is formed in a portion of an upper surface of the n − -type semiconductor substrate ( 1 ) in the active region. A plurality of p + -type guard ring layers ( 3 ) are formed in a portion of the upper surface of the n − -type semiconductor substrate ( 1 ) in the terminal region. An n + -type cathode layer ( 5 ) is formed in a lower surface of the n − -type semiconductor substrate ( 1 ). An anode electrode ( 6 ) is connected to the p + -type anode layer ( 2 ). A metallic cathode electrode ( 7 ) is connected to the n + -type cathode layer ( 5 ). A recess ( 8 ) is formed by trenching the n + -type cathode layer ( 5 ) in the terminal region. The cathode electrode ( 7 ) is also formed in the recess ( 8 ).

Claims (19)

1. A semiconductor device comprising:

a substrate including an active region and a terminal region disposed outside the active region;

a p + -type anode layer formed in a portion of an upper surface of the substrate in the active region;

a plurality of p + -type guard ring layers formed in a portion of the upper surface of the substrate in the terminal region;

an n + -type cathode layer formed in a lower surface of the substrate;

an anode electrode connected to the p + -type anode layer; and

a metallic cathode electrode connected to the n + -type cathode layer,

wherein a recess is formed by completely removing the n + -type cathode layer in the terminal region, and the cathode electrode is also formed in the recess.

2. The semiconductor device of claim 1 , wherein in the terminal region, not only the n + -type cathode layer but also the n − -type semiconductor substrate is trenched to an intermediate position to form the recess.

3. The semiconductor device of claim 1 , wherein the recess extends not only through the terminal region but also to an intermediate position in the active region.

4. A semiconductor device comprising:

a substrate including an active region and a terminal region disposed outside the active region;

a p + -type anode layer formed in a portion of an upper surface of the substrate in the active region;

a plurality of p + -type guard ring layers formed in a portion of the upper surface of the substrate in the terminal region;

an n + -type cathode layer formed in a lower surface of the substrate;

an anode electrode connected to the p + -type anode layer; and

a metallic cathode electrode connected to the n + -type cathode layer,

wherein a recess is formed by trenching the n + -type cathode layer in the terminal region, and the cathode electrode is also formed in the recess, and

wherein the recess is formed only in a corner portion of the substrate as viewed in plan.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2015
From: OTSUKI, EIKO; SADAMATSU, KOJI; YOSHIURA, YASUHIRO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 036946/0470 →
Continuity (1)
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