IP Library › Granted Patent US 9,460,992
Granted Patent B2
US 9,460,992 · App. 14/641,901 · Granted Oct 4, 2016

Packaging substrate having a through-holed interposer

Inventors: Tzyy-Jang Tseng (Taoyuan, TW); Dyi-Chung Hu (Taoyuan, TW); Ying-Chih Chan (Taoyuan, TW)
Assignee: Unimicron Technology Corp.
H01L23/49838H01L21/486H01L21/4867H01L21/56H01L21/563H01L21/768H01L23/3128H01L23/481H01L23/49811H01L23/49827H05K1/115H01L23/49816H01L23/49822H01L24/16H01L25/0655H01L2224/131H01L2224/16238H01L2224/32225H01L2224/73204H01L2924/15174H01L2924/15311
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Quick Facts
Patent No.
US 9,460,992
App. No.
14/641,901
Granted
Oct 4, 2016
Kind
B2
Abstract

A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.

Claims (9)

1. A packaging substrate, comprising:

an interposer having opposing first and second surfaces and a plurality of conductive gels interconnecting the first surface and the second surface, wherein each of the conductive gels has opposing first and second ends, such that the first end protrudes from the first surface of the interposer, and a circuit redistribution structure is disposed on the second surface of the interposer and electrically connected to the second ends of the conductive gels;

an encapsulating layer that encapsulates and is in direct contact with side surfaces and the first surface of the interposer; and

a circuit built-up structure disposed on the encapsulating layer above the first surface of the interposer and electrically connected to the first ends of the conductive gels.

2. The packaging substrate of claim 1 , wherein the circuit built-up structure has at least a built-up dielectric layer, and a built-up circuit layer formed on the built-up dielectric layer and electrically connected to the first ends of the conductive gels.

3. The packaging substrate of claim 2 , wherein the built-up circuit layer is embedded in the encapsulating layer.

4. The packaging substrate of claim 3 , wherein the circuit built-up structure further comprises a plurality of built-up conductive vias formed in the built-up dielectric layer and electrically connected to the built-up circuit layer.

5. The packaging substrate of claim 1 , wherein the circuit redistribution structure has at least a redistribution dielectric layer, and a redistribution circuit layer formed on the redistribution dielectric layer and electrically connected to the second ends of the conductive gels.

6. The packaging substrate of claim 5 , wherein the circuit redistribution structure further has a plurality of redistribution conductive vias formed in the redistribution dielectric layer and electrically connected to the redistribution circuit layer.

Priority Claims (1)
TW 101126991 A · Jul 26, 2012 · national
Continuity (2)
Division 13845625 · Mar 18, 2013
Related Publication 20150187692A1 · Jul 2, 2015