Semiconductor device and method of forming the same
A semiconductor device includes a wiring board; a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chip comprising via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes to the wiring board; a first seal that seals the stack of semiconductor chips; and a second seal that covers the first seal. The first seal is smaller in elastic modulus than the second seal.
1. A semiconductor device comprising:
a wiring board;
a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chips including via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes to the wiring board;
a first seal that seals the stack of semiconductor chips and covers a top surface of a topmost semiconductor chip in the stack of semiconductor chips, the stack of semiconductor chips being without a semiconductor chip stacked on top of the topmost semiconductor chip; and
a second seal that covers the first seal,
wherein the first seal is smaller in elastic modulus than the second seal, and
wherein the first seal covers an entire top portion and outer sides of the stack of semiconductor chips.
2. The semiconductor device according to claim 1 , wherein the first seal fills gaps between the semiconductor chips and a gap between the wiring board and the stack of semiconductor chips.
3. The semiconductor device according to claim 1 , wherein the first seal covers a first surface of the stack of semiconductor chips, the first surface being opposite to a second surface of the stack of semiconductor chips, the second surface facing toward the wring board.
4. The semiconductor device according to claim 1 , wherein each of the semiconductor chips further comprises bump electrodes, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to the wiring board.
5. The semiconductor device according to claim 1 , further comprising:
external connection electrodes disposed on a first surface of the wiring board, the wiring board having a second surface opposite to the first surface,
wherein the stack of semiconductor chips is disposed over the second surface of the wiring board.
6. The semiconductor device according to claim 1 , wherein each of the semiconductor chips comprises a circuit element layer on a surface which faces away from the wiring board.
7. The semiconductor device according to claim 1 , wherein the elastic modulus of the first seal and a coefficient of thermal expansion of the first seal have a relationship such that when the elastic modulus is 0.2 MPa, the coefficient of thermal expansion is 1 to 300 ppm/° C., when the elastic modulus is 2 MPa, the coefficient of thermal expansion is 1 to 100 ppm/° C., and when the elastic modulus is 10 MPa, the coefficient of thermal expansion is 1 to 50 ppm/° C.
8. The semiconductor device according to claim 1 , wherein the first seal comprises a silicone rubber.
9. The semiconductor device according to claim 8 , wherein the second seal comprises a mold resin.
10. A semiconductor device comprising:
a wiring board;
a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chips comprising via electrodes and bump electrodes, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to the wiring board;
a first seal that seals the stack of semiconductor chips and covers a top surface of a topmost semiconductor chip in the stack of semiconductor chips, the stack of semiconductor chips being without a semiconductor chip stacked on top of the topmost semiconductor chip, the first seal filling gaps between the semiconductor chips and a gap between the wiring board and the stack of semiconductor chips; and
a second seal that covers the first seal,
wherein the first seal is smaller in Young's modulus than the second seal, and
wherein the first seal covers an entire top portion and outer sides of the stack of semiconductor chips.
11. The semiconductor device according to claim 10 , wherein the first seal covers a first surface of the stack of semiconductor chips, the first surface being opposite to a second surface of the stack of semiconductor chips, the second surface facing toward the wring board.
12. The semiconductor device according to claim 10 , further comprising:
external connection electrodes disposed on a first surface of the wiring board, the wiring board having a second surface opposite to the first surface,
wherein the stack of semiconductor chips is disposed over the second surface of the wiring board.
13. The semiconductor device according to claim 10 , wherein the elastic modulus of the first seal and a coefficient of thermal expansion of the first seal have a relationship such that when the elastic modulus is 0.2 MPa, the coefficient of thermal expansion is 1 to 300 ppm/° C., when the elastic modulus is 2 MPa, the coefficient of thermal expansion is 1 to 100 ppm/° C., and when the elastic modulus is 10 MPa, the coefficient of thermal expansion is 1 to 50 ppm/° C.
14. The semiconductor device according to claim 10 , wherein the first seal comprises a silicone rubber.
15. The semiconductor device according to claim 14 , wherein the second seal comprises a mold resin.
16. A semiconductor device comprising: an interposer substrate;
a stack of semiconductor chips disposed over the interposer substrate, each of the semiconductor chips including via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrode to the interposer substrate;
an underfilling resin that seals the stack of semiconductor chips and covers a top surface of a topmost semiconductor chip in the stack of semiconductor chips, the stack of semiconductor chips being without a semiconductor chip stacked on top of the topmost semiconductor chip, the underfilling resin filling gaps between the semiconductor chips and a gap between the interposer substrate and the stack of semiconductor chips; and
a mold resin that covers the underfilling resin,
wherein the underfilling resin is smaller in Young's modulus than the mold resin, and
wherein the underfilling resin covers an entire top portion and outer sides of the stack of semiconductor chips.
17. The semiconductor device according to claim 16 , wherein the underfilling resin covers a first surface of the stack of semiconductor chips, the first surface being opposite to a second surface of the stack of semiconductor chips, the second surface facing toward the interposer substrate.
18. The semiconductor device according to claim 16 , wherein each of the semiconductor chips further includes bump electrodes, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes and the bump electrodes to the interposer substrate.
19. The semiconductor device according to claim 16 , further comprising:
external connection electrodes disposed on a first surface of the interposer substrate, the interposer substrate having a second surface opposite to the first surface,
wherein the stack of semiconductor chips is disposed over the second surface of the interposer substrate.
20. The semiconductor device according to claim 16 , wherein the elastic modulus of the underfilling resin and a coefficient of thermal expansion of the underfilling resin have a relationship such that when the elastic modulus is 0.2 MPa, the coefficient of thermal expansion is 1 to 300 ppm/° C., when the elastic modulus is 2 MPa, the coefficient of thermal expansion is 1 to 100 ppm/° C., and when the elastic modulus is 10 MPa, the coefficient of thermal expansion is 1 to 50 ppm/° C.
21. A semiconductor device comprising:
a substrate;
a first semiconductor chip mounted over the substrate, the first semiconductor chip including a plurality of via electrodes;
a second semiconductor chip stacked over the first semiconductor chip, the second semiconductor chip including an upper surface that faces away from the first semiconductor chip, the second semiconductor chip being electrically coupled to the first semiconductor chip through the plurality of via electrodes;
an elastic member covering the upper surface of the second semiconductor chip, the second semiconductor chip being without a semiconductor chip stacked on top of the upper surface; and
a sealing resin covering the elastic member,
wherein the elastic member is smaller in elastic modulus than the sealing resin, and
wherein the elastic member covers an entire top portion and outer sides of the stacked first and second semiconductor chips.
22. The semiconductor device according to claim 21 , wherein the elastic modulus of the elastic member and a coefficient of thermal expansion of the elastic member have a relationship such that when the elastic modulus is 0.2 MPa, the coefficient of thermal expansion is 1 to 300 ppm/° C., when the elastic modulus is 2 MPa, the coefficient of thermal expansion is 1 to 100 ppm/° C., and when the elastic modulus is 10 MPa, the coefficient of thermal expansion is 1 to 50 ppm/° C.
23. The semiconductor device according to claim 21 , wherein the elastic member covers the first semiconductor chip and the second semiconductor chip.
24. The semiconductor device according to claim 23 , wherein the elastic member fills a gap between the first semiconductor chip and the second semiconductor chip, and a gap between the substrate and the first semiconductor chip.
25. The semiconductor device according to claim 21 , wherein the first semiconductor chip includes a plurality of via electrodes, the second semiconductor chip being electrically coupled to the first semiconductor chip through the plurality of via electrodes.
26. The semiconductor device according to claim 25 , further comprising:
a plurality of external electrodes disposed on the substrate, the first semiconductor chip being electrically coupled to the plurality of external terminals through the plurality of via electrodes.