IP Library › Granted Patent US 9,484,376
Granted Patent B2
US 9,484,376 · App. 14/291,512 · Granted Nov 1, 2016

Semiconductor isolation structure and manufacturing method thereof

Inventors: Yu-Yi Wang (Tainan, TW); Keng-Ying Liao (Tainan, TW); Po-Zen Chen (Tainan, TW); Yi-Hung Chen (Kaohsiung, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01L27/1463H01L27/1464H01L27/14621H01L27/14625H01L27/14627H01L27/14687H01L27/14689
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Quick Facts
Patent No.
US 9,484,376
App. No.
14/291,512
Granted
Nov 1, 2016
Kind
B2
Abstract

The present disclosure provides a method for manufacturing a semiconductor isolation structure, including providing a substrate with a top surface; forming a patterned mask over the top surface; forming a trench through the patterned mask in the substrate by a directional etch comprising nitrogen-containing substance, wherein an aspect ratio of the trench is formed to be greater than about 18, and a ratio of a width of a narrowest portion and a width of a widest portion of the isolation region is formed to be greater than about 0.7; and filling the trench with insulating materials. The present disclosure also provides an image sensing device, including a radiation sensing region with a first isolation region separating adjacent radiation detecting units and a peripheral region, wherein an aspect ratio of the first isolation region is greater than about 18.

Claims (21)

1. A method for manufacturing a semiconductor isolation structure, comprising:

providing a substrate with a top surface;

forming a patterned mask over the top surface;

forming a trench through the patterned mask in the substrate by a directional etch comprising nitrogen-containing substance, fluorine-containing substance, and oxygen-containing substance, wherein an aspect ratio of the trench is formed to be greater than about 18, and a ratio of a width of a narrowest portion and a width of a widest portion of the isolation region is formed to be greater than about 0.7, nitrogen-containing substance and the fluorine-containing substance being introduced within a ratio of from about 0.8 to about 4; and

filling the trench with insulating materials.

2. The method for manufacturing a semiconductor isolation structure of claim 1 , wherein the forming the patterned mask over the top surface comprises forming the patterned mask exposing a portion of the top surface of the substrate, and a critical dimension of the pattern on the mask is less than about 90 nm.

3. The method for manufacturing a semiconductor isolation structure of claim 1 , wherein the forming the trench through the patterned mask in the substrate by the directional etch further comprises introducing the oxygen-containing substance and the fluorine-containing substance at a ratio of about 1.

4. The method for manufacturing a semiconductor isolation structure of claim 1 , wherein the forming the trench through the patterned mask in the substrate by a directional etch comprises introducing nitrogen gas and SF 6 .

5. A method for manufacturing an image sensing device, comprising:

forming a first isolation region by forming a patterned mask over a surface of a substrate;

forming a trench through the patterned mask in the substrate by a directional etch comprising nitrogen-containing substance, wherein an aspect ratio of the trench is formed to be greater than about 18, the trench with a ratio of a width of a narrowest portion and a width of a widest portion thereof being greater than about 0.7;

filling the trench with insulating materials; and

forming a second isolation region at a peripheral region of the substrate;

wherein the patterned mask is positioned in a radiation sensing region, separating adjacent radiation detecting units, and

wherein the widest portion of the trench is configured to be positioned opposite to a radiation-receiving surface of the image sensing device.

6. The method of claim 5 , wherein the forming the trench through the patterned mask further comprises forming a SiN-based composite layer over a sidewall of the trench.

7. The method of claim 5 , wherein the forming the trench through the patterned mask further comprises forming a SiO-based composites layer over a sidewall of the trench.

8. The method of claim 6 , further comprising forming a protection layer over the SiN-based composite layer by forming an oxide stack with a thickness of from about 20 to about 200 angstroms.

9. The method of claim 5 , wherein the directional etch further comprises fluorine-containing substance and oxygen-containing substance.

10. The method of claim 5 , wherein the directional etch is configured to obtain a concave bottom in the trench.

11. The method of claim 1 , wherein the forming the trench through the patterned mask further comprises forming a SiN-based composite layer over a sidewall of the trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2014
From: WANG, YU-YI; LIAO, KENG-YING; CHEN, PO-ZEN; CHEN, YI-HUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Reel/Frame 033087/0778 →
Continuity (1)
Related Publication 20150349001A1 · Dec 3, 2015