High efficiency switched capacitor voltage regulator
A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ΔV=V2−V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+ΔV being generated across the output capacitor.
1. A switched capacitor voltage regulator circuit, including:
(a) a pump capacitor having a first node and a second node;
(b) at least one output capacitor;
(c) a first switch coupled between an input voltage Vin and the first node of the pump capacitor;
(d) a second switch coupled between a first auxiliary voltage source and the first node of the pump capacitor, wherein the first auxiliary voltage source is independent of Vin;
(e) at least one third switch between the second node of the pump capacitor and at least one corresponding output capacitor;
(f) a fourth switch coupled between a second auxiliary voltage source and the second node of the pump capacitor, wherein the second auxiliary voltage source is independent of Vin; and
(g) a clock signal, electrically coupled to each of the first, second, third, and fourth switches, for generating a first clock phase and a second clock phase;
wherein during the first clock phase, the first and third switches are open, and the second and fourth switches are closed, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage; and
wherein during a second clock phase, the first and third switches are closed, and the second and fourth switches are open, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
2. The switched capacitor voltage regulator circuit of claim 1 , further including a bypass switch for coupling the input voltage Vin to the at least one output capacitor as the output voltage Vout if the input voltage Vin exceeds a selected threshold value.
3. The switched capacitor voltage regulator circuit of claim 1 , wherein one of the first auxiliary voltage or the second auxiliary voltage is ground.
4. A method for generating an enhanced voltage, including:
(a) coupling a voltage differential across a pump capacitor during a first clock phase, thereby charging the pump capacitor to a voltage ΔV; and
(b) coupling a primary voltage Vin to the pump capacitor during a second clock phase and coupling the pump capacitor to at least one holding capacitor, thereby charging the at least one holding capacitor to an output voltage Vout approximately equal to Vin+ΔV, wherein the voltage differential is generated by first and second auxiliary voltages sources independent of Vin.
5. The method of claim 4 , further including providing the voltage differential from at least two separate voltage sources V1, V2, such that ΔV=V2−V1.
6. The method of claim 5 , wherein one of V1 or V2 is ground.
7. The method of claim 4 , further including providing a bypass switch for coupling the primary voltage Vin to the at least one holding capacitor as the output voltage Vout if the primary voltage Vin exceeds a selected threshold value.
8. A method for generating an enhanced voltage, including:
(a) coupling a first switch between an input voltage Vin and a first node of a pump capacitor;
(b) coupling a second switch between a first auxiliary voltage source and the first node of the pump capacitor, wherein the first auxiliary voltage source is independent of Vin;
(c) coupling at least one third switch between a second node of the pump capacitor and at least one corresponding output capacitor;
(d) coupling a fourth switch between a second auxiliary voltage source and the second node of the pump capacitor, wherein the second auxiliary voltage source is independent of Vin;
(e) opening the first and third switches during a first clock phase, and closing the second and fourth switches during the first clock phase, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage; and
(f) closing the first and third switches during a second clock phase, and opening the second and fourth switches during the second clock phase, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
9. The method of claim 8 , further including providing a bypass switch for coupling the input voltage Vin to the at least one output capacitor as the output voltage Vout if the input voltage Vin exceeds a selected threshold value.
10. The method of claim 8 , wherein one of the first auxiliary voltage or the second auxiliary voltage is ground.
11. A switched capacitor voltage regulator circuit for generating an enhanced voltage, including:
(a) means for coupling a voltage differential across a pump capacitor during a first clock phase, thereby charging the pump capacitor to a voltage ΔV; and
(b) means for coupling a primary voltage Vin to the pump capacitor during a second clock phase and coupling the pump capacitor to at least one holding capacitor, thereby charging the at least one holding capacitor to an output voltage Vout approximately equal to Vin+ΔV, wherein the voltage differential is generated by first and second auxiliary voltages sources independent of Vin.
12. The switched capacitor voltage regulator circuit of claim 11 , further including means for providing the voltage differential from at least two separate voltage sources V1, V2, such that ΔV=V2−V1.
13. The switched capacitor voltage regulator circuit of claim 12 , wherein one of V1 or V2 is ground.
14. The switched capacitor voltage regulator circuit of claim 11 , further including means for providing a bypass switch for coupling the primary voltage Vin to the at least one holding capacitor as the output voltage Vout if the primary voltage Vin exceeds a selected threshold value.
15. A switched capacitor voltage regulator circuit for generating an enhanced voltage, including:
(a) means for coupling a first switch between an input voltage Vin and a first node of a pump capacitor;
(b) means for coupling a second switch between a first auxiliary voltage source and the first node of the pump capacitor, wherein the first auxiliary voltage source is independent of Vin;
(c) means for coupling at least one third switch between a second node of the pump capacitor and at least one corresponding output capacitor;
(d) means for coupling a fourth switch between a second auxiliary voltage source and the second node of the pump capacitor, wherein the second auxiliary voltage source is independent of Vin;
(e) means for opening the first and third switches during a first clock phase, and closing the second and fourth switches during the first clock phase, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage; and
(f) means for closing the first and third switches during a second clock phase, and opening the second and fourth switches during the second clock phase, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
16. The switched capacitor voltage regulator circuit of claim 15 , further including means for providing a bypass switch for coupling the input voltage Vin to the at least one output capacitor as the output voltage Vout if the input voltage Vin exceeds a selected threshold value.
17. The switched capacitor voltage regulator circuit of claim 15 , wherein one of the first auxiliary voltage or the second auxiliary voltage is ground.