Semiconductor device and method for manufacturing the same
An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
1. A semiconductor device comprising:
a gate electrode over a substrate, the gate electrode comprising copper;
a first insulating film over the gate electrode, the first insulating film comprising silicon nitride;
a second insulating film over the first insulating film, the second insulating film comprising silicon oxide;
an oxide semiconductor film over the second insulating film, the oxide semiconductor film comprising indium and oxygen;
a first film over the oxide semiconductor film, the first film comprising oxide;
a second film over the oxide semiconductor film, the second film comprising oxide;
a source electrode over the oxide semiconductor film with the first film interposed therebetween;
a drain electrode over the oxide semiconductor film with the second film interposed therebetween;
a third insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, the third insulating film comprising silicon oxide;
a fourth insulating film over the third insulating film, the fourth insulating film comprising silicon nitride; and
a pixel electrode over the fourth insulating film, the pixel electrode electrically connected to one of the source electrode and the drain electrode,
wherein the oxide semiconductor film comprises a first end portion, a second end portion, a depressed portion overlapping with the gate electrode and between the first end portion and the second end portion, and a portion between the depressed portion and the first end portion,
wherein one of the first film and the second film is in contact with a top surface of the portion, and each of the first film and the second film is not in contact with a top surface of the depressed portion, and a top surface of the first end portion,
wherein a thickness of the portion is larger than a thickness of the depressed portion and larger than a thickness of the first end portion,
wherein a first gap between the first film and the second film is smaller than a second gap between the source electrode and the drain electrode,
wherein the first gap is a distance between an upper end portion of the first film and an upper end portion of the second film, and the second gap is a distance between a lower end portion of the source electrode and a lower end portion of the drain electrode, and
wherein the third insulating film is in contact with the depressed portion.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises an In-Ga-Zn-O-based oxide semiconductor.
3. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises one selected from the group consisting of an In-Sn-Ga-Zn-O-based oxide semiconductor, an In-Sn-Zn-O-based oxide semiconductor, an In-Al-Zn-O-based oxide semiconductor, an In-Zn-O-based oxide semiconductor, an In-Mg-O-based oxide semiconductor.
4. The semiconductor device according to claim 1 , wherein a carrier concentration of the oxide semiconductor film is less than 1×10 17 /cm 3 .
5. The semiconductor device according to claim 1 , further comprising an FPC connected to the substrate.
6. A semiconductor device comprising:
a gate electrode over a substrate, the gate electrode comprising copper;
a first insulating film over the gate electrode, the first insulating film comprising silicon nitride;
a second insulating film over the first insulating film, the second insulating film comprising silicon oxide;
an oxide semiconductor film over the second insulating film, the oxide semiconductor film comprising indium and oxygen;
a first film over the oxide semiconductor film, the first film comprising oxide;
a second film over the oxide semiconductor film, the second film comprising oxide;
a source electrode over the oxide semiconductor film with the first film interposed therebetween;
a drain electrode over the oxide semiconductor film with the second film interposed therebetween;
a third insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, the third insulating film comprising silicon oxide;
a fourth insulating film over the third insulating film, the fourth insulating film comprising silicon nitride;
a fifth insulating film over the fourth insulating film; and
a pixel electrode over the fifth insulating film, the pixel electrode electrically connected to one of the source electrode and the drain electrode,
wherein the oxide semiconductor film comprises a first end portion, a second end portion, a depressed portion overlapping with the gate electrode and between the first end portion and the second end portion, and a portion between the depressed portion and the first end portion,
wherein one of the first film and the second film is in contact with a top surface of the portion, and each of the first film and the second film is not in contact with a top surface of the depressed portion, and a top surface of the first end portion,
wherein a thickness of the portion is larger than a thickness of the depressed portion and larger than a thickness of the first end portion,
wherein a first gap between the first film and the second film is smaller than a second gap between the source electrode and the drain electrode,
wherein the first gap is a distance between an upper end portion of the first film and an upper end portion of the second film, and the second gap is a distance between a lower end portion of the source electrode and a lower end portion of the drain electrode, and
wherein the third insulating film is in contact with the depressed portion.
7. The semiconductor device according to claim 6 , wherein the oxide semiconductor film comprises an In-Ga-Zn-O-based oxide semiconductor.
8. The semiconductor device according to claim 6 , wherein the oxide semiconductor film comprises one selected from the group consisting of an In-Sn-Ga-Zn-O-based oxide semiconductor, an In-Sn-Zn-O-based oxide semiconductor, an In-Al-Zn-O-based oxide semiconductor, an In-Zn-O-based oxide semiconductor, an In-Mg-O-based oxide semiconductor, an In-Ga-O-based oxide semiconductor, and an In-O-based oxide semiconductor.
9. The semiconductor device according to claim 6 , wherein a carrier concentration of the oxide semiconductor film is less than 1×10 17 /cm 3 .
10. The semiconductor device according to claim 6 , further comprising an FPC connected to the substrate.
11. The semiconductor device according to claim 6 , wherein the fifth insulating film comprises acrylic.
12. The semiconductor device according to claim 6 , further comprising:
a liquid crystal layer over the pixel electrode;
a second substrate over the liquid crystal layer; and
a spacer between the substrate and the second substrate, the spacer overlapping with the gate electrode.
13. The semiconductor device according to claim 12 , wherein the oxide semiconductor film comprises an In-Ga-Zn-O-based oxide semiconductor.
14. The semiconductor device according to claim 12 , wherein the oxide semiconductor film comprises one selected from the group consisting of an In-Sn-Ga-Zn-O-based oxide semiconductor, an In-Sn-Zn-O-based oxide semiconductor, an In-Al-Zn-O-based oxide semiconductor, an In-Zn-O-based oxide semiconductor, an In-Mg-O-based oxide semiconductor, an In-Ga-O-based oxide semiconductor, and an In-O-based oxide semiconductor.
15. The semiconductor device according to claim 12 , wherein a carrier concentration of the oxide semiconductor film is less than 1×10 ″ /cm 3 .
16. The semiconductor device according to claim 12 , further comprising an FPC connected to the substrate.
17. The semiconductor device according to claim 12 , wherein the fifth insulating film comprises acrylic.
18. The semiconductor device according to claim 12 , wherein each of the source electrode and the drain electrode comprises copper.
19. The semiconductor device according to claim 12 , further comprising:
an alignment film between the liquid crystal layer and the second substrate,
wherein the spacer is located between the alignment film and the second substrate, and
wherein a width of a second substrate side end of the spacer is larger than a width of a substrate side end of the spacer.
20. A semiconductor device comprising:
a gate electrode;
a first insulating film over the gate electrode, the first insulating film comprising silicon nitride;
a second insulating film over the first insulating film, the second insulating film comprising silicon oxide;
an oxide semiconductor film over the second insulating film, the oxide semiconductor film comprising indium and oxygen;
a first film over the oxide semiconductor film, the first film comprising oxide;
a second film over the oxide semiconductor film, the second film comprising oxide;
a first conductive film over the oxide semiconductor film with the first film interposed therebetween;
a second conductive film over the oxide semiconductor film with the second film interposed therebetween;
a third insulating film over the oxide semiconductor film, the first conductive film, and the second conductive film, the third insulating film comprising silicon oxide;
a fourth insulating film over the third insulating film, the fourth insulating film comprising silicon nitride; and
a pixel electrode over the fourth insulating film, the pixel electrode electrically connected to one of the first conductive film and the second conductive film,
wherein the oxide semiconductor film comprises a first end portion, a second end portion, a depressed portion overlapping with the gate electrode and between the first end portion and the second end portion, and a portion between the depressed portion and the first end portion,
wherein one of the first film and the second film is in contact with a top surface of the portion, and each of the first film and the second film is not in contact with a top surface of the depressed portion, and a top surface of the first end portion,
wherein a thickness of the portion is larger than a thickness of the depressed portion and larger than a thickness of the first end portion,
wherein a first gap between the first film and the second film is smaller than a second gap between the first conductive film and the second conductive film,
wherein the first gap is a distance between an upper end portion of the first film and an upper end portion of the second film, and the second gap is a distance between a lower end portion of the first conductive film and a lower end portion of the second conductive film, and
wherein the third insulating film is in contact with the depressed portion.
21. The semiconductor device according to claim 20 ,
wherein one of the first conductive film and the second conductive film comprises copper, and
wherein the gate electrode comprises copper.
22. The semiconductor device according to claim 20 , wherein the oxide semiconductor film comprises an In-Ga-Zn-O-based oxide semiconductor.
23. The semiconductor device according to claim 20 , wherein a carrier concentration of the oxide semiconductor film is less than 1×10 17 /cm 3 .