IP Library › Granted Patent US 9,536,619
Granted Patent B2
US 9,536,619 · App. 14/723,087 · Granted Jan 3, 2017

Hybrid-HDD with improved data retention

Inventors: Richard M. Ehrlich (Saratoga, CA); Eric R. Dunn (Cupertino, CA); Hiroshi Sukegawa (Tokyo, JP)
Assignee: Kabushiki Kaisha Toshiba
G11C16/3418G11C16/16G11C16/26G11C16/3459G11C29/08
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Quick Facts
Patent No.
US 9,536,619
App. No.
14/723,087
Granted
Jan 3, 2017
Kind
B2
Abstract

Data are refreshed in a nonvolatile solid-state device to significantly reduce the likelihood of data retention errors. Test data are written in a region of the nonvolatile solid-state device when user data are stored in the nonvolatile solid-state device, and are subsequently read to detect the possibility of data retention errors occurring when the associated user data are read. The test data may be a portion of the user data or a predetermined test pattern. To increase sensitivity to incipient charge leakage that may compromise the user data, the test data may be written using a modified write process and/or read with a modified read operation. The nonvolatile solid-state device may be employed as part of a solid-state drive or as the flash-memory portion of a hybrid hard disk drive.

Claims (50)

1. A method of refreshing data in a non-volatile solid-state device divided into a plurality of regions including a first region that has written therein first test data and first user data and a second region that has written therein second test data and second user data, the method comprising:

detecting a condition to perform testing;

in response to detecting the condition, measuring a quality of the first test data and a quality of the second test data;

determining that the quality of the first test data exceeds a threshold and the quality of the second test data is below the threshold;

in response to the quality of the first test data exceeding the threshold, maintaining the first user data in the first block;

in response to the quality of the second test data being below the threshold, rewriting the second user data in a third region of the non-volatile solid-state device; and

after rewriting the second user data in the third region, indicating that the second region is available for reuse.

2. The method of claim 1 , wherein the non-volatile solid-state device is a hybrid HDD device.

3. The method of claim 2 , wherein measuring the quality of the first test data comprises reading the first test data using a read threshold that is selected to increase a likelihood of read errors occurring.

4. The method of claim 2 , wherein measuring the quality of the first test data comprises:

reading the first test data; and

tracking a number of bit errors associated with reading the first test data.

5. The method of claim 1 , wherein

the first test data include a predetermined data test pattern that is written in the first region with a first write programming voltage, and

the first user data are written in the first region with a second write programming voltage that is greater than the first write threshold voltage.

6. The method of claim 1 , wherein

the first test data include a predetermined data test pattern that is written in the first region with a write operation that uses a first write period, and

the first user data are written in the first region with a write operation that uses a second write period that is longer than the first write period.

7. The method of claim 1 , wherein the test data includes a predetermined data test pattern or user data, or a combination of both.

8. A non-volatile solid-state device, comprising:

a plurality of data storage regions including a first region that has written therein first test data and first user data and a second region that has written therein second test data and second user data; and

a controller configured to:

detect a condition to perform testing;

in response to detecting the condition, measure a quality of the first test data and a quality of the second test data;

determine that the quality of the first test data exceeds a threshold and the quality of the second test data is below the threshold;

in response to the quality of the first test data exceeding the threshold, maintain the first user data in the first block;

in response to the quality of the second test data being below the threshold, rewrite the second user data in a third region of the non-volatile solid-state device; and

after rewriting the second user data in the third region, indicate that the second region is available for reuse.

9. The non-volatile solid-state device of claim 8 , wherein the first region comprises a first erasable block of the non-volatile solid-state device and the second region comprises a second erasable block of the non-volatile solid-state device.

10. The non-volatile solid-state device of claim 9 , wherein the first test data are written in a first page of the first erasable block.

11. The non-volatile solid-state device of claim 9 , wherein the first test data are written in the first region before the first user data are written in the first region.

12. The non-volatile solid-state device of claim 8 , wherein the first region comprises a single erasable block from each of a plurality of memory dies of the non-volatile solid-state device, and the second region comprises a single erasable block from each of the plurality of memory dies.

13. The non-volatile solid-state device of claim 8 , wherein the non-volatile solid-state device is a hybrid HDD device.

14. The non-volatile solid-state device of claim 13 , wherein the controller is configured to measure the quality of the first test data by reading the first test data using a read threshold that is selected to increase a likelihood of read errors occurring.

15. The non-volatile solid-state device of claim 13 , wherein the condition for initiating testing comprises one of powering on of the non-volatile solid-state device, expiration of a predetermined time interval, detection of a number of program/erase cycles that exceeds a predetermined value, and detection of a number of read errors associated with data stored in the first region or the second region that exceeds a predetermined maximum value.

16. The non-volatile solid-state device of claim 13 , wherein the controller is configured to measure the quality of the first test data by:

reading the first test data; and

tracking a number of bit errors associated with reading the first test data.

17. The non-volatile solid-state device of claim 8 , wherein

the first test data include a predetermined data test pattern that is written in the first region with a first write threshold voltage, and

the first user data are written in the first region with a second write threshold voltage that is greater than the first write threshold voltage.

18. The non-volatile solid-state device of claim 8 , wherein

the first test data include a predetermined data test pattern that is written in the first region with a write operation that uses a first write period, and

the first user data are written in the first region with a write operation that uses a second write period that is longer than the first write period.

19. The non-volatile solid-state device of claim 8 , wherein

a program verify operation associated with writing the first test data in the first region uses a first verification threshold voltage, and

a program verify operation associated with writing the user data in the first region uses a second verification threshold voltage that is lower than the first verification threshold.

20. The non-volatile solid-state device of claim 8 , wherein the test data includes a predetermined data test pattern or user data, or a combination of both.

21. The non-volatile solid-state device of claim 8 , the controller is further configured to store the second user data on a magnetic storage device associated with the non-volatile solid-state device.

22. The non-volatile solid-state device of claim 8 , wherein rewriting the second user data in the third region comprises writing the second user data in the third region as part of a garbage collection operation.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: EHRLICH, RICHARD M.; DUNN, ERIC R.
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 035726/0098 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035726/0108 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: SUKEGAWA, HIROSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035726/0111 →
Continuity (1)
Related Publication 20160351270A1 · Dec 1, 2016