IP Library › Granted Patent US 9,536,881
Granted Patent B2
US 9,536,881 · App. 14/259,912 · Granted Jan 3, 2017

Semiconductor devices having fin shaped channels

Inventors: Shigenobu Maeda (Seongnam-si, KR); Sung-Bong Kim (Suwon-si, KR); Chang-Wook Moon (Seoul, KR); Dong-Hun Lee (Anyang-si, KR); Hyung-Soon Jang (Hwaseong-si, KR); Sang-Pil Sim (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L27/0924H01L21/823807H01L21/823814H01L21/823821H01L27/0207H01L27/1108
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,536,881
App. No.
14/259,912
Granted
Jan 3, 2017
Kind
B2
Abstract

Semiconductor devices are provided. The semiconductor devices include a first fin; a first gate electrode intersecting the first fin; a first elevated source and/or drain on respective sides of the first gate electrode on the first fin; and a first field dielectric film adjacent the first fin. The first field dielectric film includes a first part below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain.

Claims (29)

1. A semiconductor device comprising:

a first fin;

a first gate electrode intersecting the first fin;

a first elevated source and/or drain on respective sides of the first gate electrode on the first fin;

a first field dielectric film adjacent the first fin, wherein the first field dielectric film includes a first part having an upper surface at or below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain; and

a spacer on the first part of the field dielectric film and between the first gate electrode and the first elevated source and/or drain.

2. The semiconductor device of claim 1 , wherein a width of the second part of the first field dielectric film is smaller than a width of the first part of the first field dielectric film.

3. The semiconductor device of claim 1 :

wherein the first elevated source and/or drain includes a fifth part and a sixth part, the fifth part being closer to the first fin than the sixth part;

wherein a width of the fifth part is smaller than a width of the sixth part; and

wherein the second part of the first field dielectric film contacts the sixth part of the first elevated source and/or drain.

4. The semiconductor device of claim 3 , wherein the second part of the first field dielectric film does not contact the fifth part of the first elevated source and/or drain.

5. The semiconductor device of claim 4 , further comprising an airgap between the second part of the first field dielectric film and the fifth part of the first elevated source and/or drain.

6. The semiconductor device of claim 4 , further comprising an insulating material having a lower dielectric constant than the first field dielectric film between the second part of the first field dielectric film and the fifth part of the first elevated source/drain.

7. The semiconductor device of claim 3 , wherein the first elevated source and/or drain is one of a diamond shape, circular and rectangular.

8. The semiconductor device of claim 1 , further comprising:

a third fin spaced apart from the first fin; and

a second field dielectric film between the first fin and the third fin, the second field dielectric film including a third region below the first fin and an upper surface of the second fin and a fourth region protruding from the third region above the first fin and the top surface of the second fin; and

a dummy gate on the second field dielectric film.

9. The semiconductor device of claim 8 , wherein an upper surface of the second part of the first field dielectric film and an upper surface of a fourth region of the second field dielectric film are parallel.

10. A semiconductor device comprising:

a first fin;

a first gate electrode intersecting the first fin;

a first elevated source and/or drain on respective sides of the first gate electrode on the first fin;

a first field dielectric film adjacent the first fin, wherein the first field dielectric film includes a first part having an upper surface at or below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain;

a second fin;

a second gate electrode intersecting the second fin; and

a second elevated source and/or drain on respective sides of the second gate electrode on the second fin, wherein one side of the second part of the first field dielectric film contacts the first elevated source and/or drain and the second elevated source and/or drain, respectively,

wherein the first elevated source and/or drain and the second elevated source and/or drain have different conductivity types.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2014
From: MAEDA, SHIGENOBU; KIM, SUNG-BONG; MOON, CHANG-WOOK; LEE, DONG-HUN; JANG, HYUNG-SOON; SIM, SANG-PIL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 032740/0445 →
Priority Claims (1)
KR 10-2013-0045022 · Apr 23, 2013 · national
Continuity (1)
Related Publication 20140312427A1 · Oct 23, 2014