Method of fabricating semiconductor device having a trench structure penetrating a buried layer

1. A method of fabricating a lateral-diffusion-metal-oxide-semiconductor (LDMOS) device, comprising:

providing a semiconductor substrate;

forming a buried layer in the semiconductor substrate;

forming a well having a first conductivity type in the semiconductor substrate, wherein the well is disposed on the buried layer;

forming a first trench structure in the well, wherein the first trench structure extends into the buried layer and a bottom surface of the first trench structure not passing through and higher than a bottom surface of the buried layer;

forming a second trench structure in the semiconductor substrate, wherein a depth of the second trench structure is larger than a depth of the buried layer;

performing a first ion implantation process to form a first doped region in the well at one side of the first trench structure, wherein the first doped region contacts the buried layer;

performing a second ion implantation process to form a second well in the well at the other side of the first trench structure, wherein the second well has a second conductivity type and does not contact the buried layer;

forming at least a gate on the semiconductor substrate, wherein the gate overlaps a part of the well between the first trench structure and the second trench structure;

forming at least a third doped region in the first doped region; and

forming at least a second doped region in the second well.

2. The method of fabricating a LDMOS device according to claim 1 , wherein the method for forming the well having the first conductivity type comprises:

forming an epitaxial layer on the buried layer; and

performing an ion implantation process to form the well in the epitaxial layer.

3. The method of fabricating a LDMOS device according to claim 1 , wherein a width of the first trench structure is smaller than a width of the second trench structure.

4. The method of fabricating a LDMOS device according to claim 1 , wherein the method for forming the first trench structure and the second trench structure comprises:

forming a patterned mask on the semiconductor substrate for defining at least a first trench structure region and at least a second trench structure region, wherein a width of the first trench structure region is smaller than a width of the second trench structure region; and

performing an etching process for forming at least a first trench and at least a second trench, wherein a depth of the first trench is smaller than a depth of the second trench.

5. The method of fabricating a LDMOS device according to claim 4 , wherein the method for forming the first trench structure and the second trench structure further comprises:

performing a thermal oxidation process for forming an oxide layer respectively covering the bottom and the inner sides of the first trench and a bottom and inner sides of the second trench;

forming a dielectric layer made of oxide for filling the first trench and the second trench; and

performing a chemical mechanical polishing (CMP) process.

6. The method of fabricating a LDMOS device according to claim 1 , wherein the first doped region has a dopant concentration, and the dopant concentration increases progressively from an interface between the first doped region and the buried layer towards an interface between the first doped region and the semiconductor substrate.

7. The method of fabricating a LDMOS device according to claim 1 , wherein the first trench structure is between the first doped region and the second doped region.

8. The method of fabricating a LDMOS device according to claim 1 , wherein the second trench structure is in the semiconductor substrate at the other side of the gate opposite to the first trench structure.

9. The method of fabricating a LDMOS device according to claim 1 , wherein the first conductivity type comprises n-type or p-type, and the second conductivity type comprises the other one.